TSIHT encoding can save the memory requirement by maintaining high quality low bit rate. The TSIHT algorithm has been implemented on a chip with CMOS technology of 0.35 μm 1P4M. The chip can handle 256x256 grayscale images and the gate count is approximately 2560 doors within the 247500 mum2 area. The latency of the critical path is 6.32 ns, and the maximum working frequency can be as high as 158 MHz.