19-11-2012, 12:50 PM
8255 PPI
8255 PPI.pptx (Size: 152.77 KB / Downloads: 27)
Features
It is a programmable device.
It has 24 I/O programmable pins like PA,PB,PC (3-8 pins).
TTL compatible.
Improved dc driving capability
PPI – Programmable Peripheral Interface
It is an I/O port chip used for interfacing I/O devices with microprocessor
Function of pins:
Data bus(D0-D7):These are 8-bit bi-directional buses, connected to 8085 data bus for transferring data.
CS: This is Active Low signal. When it is low, then data is transfer from 8085.
Read: This is Active Low signal, when it is Low read operation will be start.
Write: This is Active Low signal, when it is Low Write operation will be start.
Data Bus buffer
It is a 8-bit bidirectional Data bus.
Used to interface between 8255 data bus with system bus.
The internal data bus and Outer pins D0-D7 pins are connected in internally.
The direction of data buffer is decided by Read/Control Logic.
Group A and Group B control
Group A and B get the Control
Signal from CPU and send the command to the individual control blocks.
Group A send the control signal to port A and Port C (Upper) PC7-PC4.
Group B send the control signal to port B and Port C (Lower) PC3-PC0.
PORT A:
This is a 8-bit buffered I/O latch.
It can be programmed by mode 0 , mode 1, mode 2 .
Operation modes:
BIT SET/RESET MODE:
The PORT C can be Set or Reset by sending OUT instruction to the CONTROL registers.
I/O MODES:
MODE 0(Simple input / Output):
In this mode, ports A, B are used as two simple 8-bit I/O ports
port C as two 4-bit ports.
Each port can be programmed to function as simply an input port or an output port. The input/output features in Mode 0 are as follows.
Features:
Outputs are latched , Inputs are buffered not latched.
Ports do not have Handshake or interrupt capability.