30-09-2016, 04:43 PM
1457100209-ABluetoothbasedArchitectureforAndroidCommunicationwithanArticulatedRobot.docx (Size: 1.45 MB / Downloads: 4)
ABSTRACT
In industrial robotic environments, there are many different robots performing a variety of tasks. Each robot is controlled by its own teach pendant or via a networked socket application. However, to monitor the status or make minor changes to the programming of the robot, the user must obtain access to the teach pendant or terminal. In an effort to eliminate this need, this paper introduces an android platform that communicates with robots over a Bluetooth connection.
INTRODUCTION
1.1 OVERVIEW
1.2 PROBLEM DEFINITION
1. Allows a malicious service provider, who has successfully communicated with a legal user twice, to recover the user’s credential and then to impersonate the user to access resources and services offered by other service providers.
2. Insecure against both impersonation attacks and identity disclosure attacks
3. Scheme suffers from Deniable of Service (DoS) attacks and presented a new scheme
4. One user to maintain distinct pairs of identity and password for different service providers, since this could increase the workload of both users and service providers as well as the communication overhead of networks
LITERATURE SURVEY
1. PSFQ is designed to be scalable and energy efficient, trying to minimize the number of signaling messages and relying on multiple local timers. It addresses reliable communication from sink to sensors nodes (downstream). PSFQ consists of three “operations”: pump, fetch, and report operations.
Advantages:
In this paper an overview of congestion control techniques for constrained environment is made, scenarios of network performance, when congestion can appear and become a catastrophic are underlined. An idea of improving congestion control mechanism of Constrained Application Protocol is proposed.
Disadvantages:
• We cannot do communicate for multiple wireless sensor networks properly
• Traffic accused in this sensor networks
2. Adaptive Duty Cycle based Congestion Control (ADCC) is energy efficient and lightweight congestion control scheme, with duty cycle adjustment for wireless sensor networks. It uses combined mechanism of resource control scheme and traffic control scheme.
Advantages:
Application integration is a challenging task, and it is observed from our paper that following a structured approach to application integration is a key success factor. In addition, using a design pattern and data modeling as an enabler helped us to realize a complete solution in a very short period of time. We are able to use heterogeneous technologies successfully, and integrate them seamlessly, using the principles stated in our approach.
Disadvantages:
• We cannot scheduled period time delay in nodes
• Accused in data path in correctly
3. Priority based Congestion Control (PCCP) is an upstream congestion control protocol that is used in case of many-to-one communication. It introduces the concept of node priority index. PCCP consists of 3 components: a) Intelligent Congestion Detection (ICD) b) Implicit Congestion Notification and c) Priority based Rate Adjustment (PRA).
Advantages:
Node level congestion is occurred at particular node when the packet inter arrival rate is greater than the scheduling rate ,this result in packet loss , increasing queuing delay and requires retransmission of packets.
Disadvantages:
• This paper only simulated communicating with the priority based congestion control.
• Output of traffic signal should be low
4. GARUDA constructs a two-tier topology and proposes two stage loss recovery. It is designed to be operational in networks composed of sensor nodes (SNs) located at fixed locations. GARUDA belongs to downstream reliability guarantee. It solves the problem of reliable transport by transmitting a high-energy pulse, called WFP (Wait-for First Packet), before transmitting the first packet.
Advantages:
Application integration is a challenging task, and it is observed from our paper that following a structured approach to application integration is a key success factor. In addition, using a design pattern, and data modeling as an enabler helped us to realize a complete solution in a very short period of time. We are able to use heterogeneous technologies successfully, and integrate them seamlessly, using the principles stated in our approach.
Disadvantages:
• We cannot be implemented calculating distance and data loss
• We are getting traffic information Not properly
5. Buffer based Congestion Avoidance is based on lightweight buffer management .It prevents data packets from overflowing the buffer space of intermediate sensors.
Advantages:
Link level congestion is occurred due to channel contention ,interference , packet collision due to accessing transmission medium simultaneously by multiple active sensor nodes.
Disadvantages:
• Channel path identification not occurred in Zigbee
• Point to point communication only
• Transmitted and received not correctly..
6. Event to Sink Reliable Transport (ESRT) is a novel transport solution that seeks to achieve reliable event detection with minimum energy expenditure and congestion resolution.
7. Long Term Path Congestion Control the basic idea is that the intermediate nodes along active paths detect onset of congestion and notify the , source to reduce the loading rate to next predefined rate.[8]
8. CODA (Congestion Detection and Avoidance) is an upstream congestion mitigation strategy that consists of three elements: congestion detection , open-loop hop-by-hop backpressure, and closed-loop end-to-end multisource regulation. The queue length or buffer occupancy and channel load are used for detecting the congestion.
3. SYSTEM ANALYSIS
3.1 EXISTING SYSTEM
Previously We Used Only manual calculating and sensor values to updated in database
We measured the separate area sensor values.So Lots of delay to be occurred.
High Cost.
Each system to be operated will more Power required.
3.3 PROPOSED SYSTEM
To monitor the status or make minor changes to the programming of the robot, the user must obtain access to the teach pendant or terminal.
In an effort to eliminate this need, this paper introduces an android platform that communicates with robots over a Bluetooth connection
Easy to navigate to collect the data’s and monitoring.
SYSTEM REQUIREMENTS
4.1 REQUIREMENTS ANALYSIS
4.1.1 HARDWARE REQUIERMENTS
POWER SUPPLY
GAS SENSOR
TEMPERATURE SENSOR
ARM7TDMI PROCESSOR
ULN2003
RELAY
DC MOTOR
MAX232
XBEE802.15.4
BLUETOOTH MODULE
LCD.
PC
4.1.2 SOFTWARE REQUIERMENTS
Embedded C Language.
HI-TECH C.
MPLAB IDE v8.43.
EMBEDDED TECHNOLOGY
An embedded system can be defined as a computing device that does a specific focused job. Appliances such as the air-conditioner, VCD player, DVD player, printer, fax machine, mobile phone etc. are examples of embedded systems. Each of these appliances will have a processor and special hardware to meet the specific requirement of the application along with the embedded software that is executed by the processor for meeting that specific requirement. The embedded software is also called “firm ware”. The desktop/laptop computer is a general purpose computer. You can use it for a variety of applications such as playing games, word processing, accounting, software development and so on. In contrast, the software in the embedded systems is always fixed listed below:
Embedded systems do a very specific task, they cannot be programmed to do different things. Embedded systems have very limited resources, particularly the memory. Generally, they do not have secondary storage devices such as the CDROM or the floppy disk. Embedded systems have to work against some deadlines. A specific job has to be completed within a specific time. In some embedded systems, called real-time systems, the deadlines are stringent. Missing a deadline may cause a catastrophe-loss of life or damage to property. Embedded systems are constrained for power. As many embedded systems operate through a battery, the power consumption has to be very low.
Some embedded systems have to operate in extreme environmental conditions such as very high temperatures and humidity.
Application Areas:
Nearly 99 per cent of the processors manufactured end up in embedded systems. The embedded system market is one of the highest growth areas as these systems are used in very market segment- consumer electronics, office automation, industrial automation, telecommunications, transportation, military and so on.
HARDWARE DESCRIPTION
POWER SUPPLY
INTRODUCTION
The power supply is the most important section of all electronic devices as all devices work only with DC. DC from a battery has an advantage of being portable and ripple free. The DC voltage required for this project is a supply of +5V. LM78 SERIES IC is used to obtain the signal in the range which is compatible to the microcontroller
MAIN TRANSFORMER
When AC is applied to the primary winding of the transformer,it can be either stepped up or stepped down .In this circuit, the transformer performs the step down operation where the 230 V AC appears as 12 V across the secondary winding. One alteration of the input voltage will cause the top of the transformer to be positive and the bottom negative. The next alteration will cause the polarity to reverse.
TRANSFORMER OPERATION
The AC mains is fed to a step down transformer which brings the voltage level of the input ac signal 230 V, 50 Hz to an AC signal of amplitude 12V. This signal is fed to a bridge rectifier circuit which will convert the ac signal to a unidirectional signal.
VOLTAGE REGULATOR
A fluctuating DC voltage may result in an erratic operation of electronic devices and circuits. In order to avoid fluctuations, a voltage regulator circuit is used. Its function is to maintain a constant output DC voltage in spite of input voltage fluctuations or changes in load resistance values. The unregulated input voltage must always be higher than the regulators output voltage by at least 3V in order for it to work. If the input/output voltage difference is greater than 3V then the excess potential must be dissipated as heat. Without a heat sink 3 terminal regulators can dissipate about 2W. Over 2W a heat sink must be provided.
POWER SUPPLY REGULATOR(IC 78L05)
FEATURES
• Output current upto 1A.
• Maximum Input Voltage 35V.
• Output Voltage of 5V.
• Thermal overload protection
• Short Circuit Protection.
• Output Transistor Safe Operating Area Protection.
WORKING
The A.C line voltage is 230V which is stepped down to 12 V using a transformer. A full wave rectifier along with a capacitor voltage provides the unregulated voltage input to IC7805 regulator. This input contains A.C ripple of few volts. This regulator provides the regulated output of 5V.
GAS SENSOR:
A gas sensor is a device which detects the presence of various gases within an area, usually as part of a safety system. This type of equipment is used to detect a gas leak and interface with a control system so a process can be automatically shut down. A gas detector can also sound an alarm to operators in the area where the leak is occurring, giving them the opportunity to leave the area. This type of device is important because there are many gases that can be harmful to organic life, such as humans or animals.
Gas detectors can be used to detect combustible, flammable and toxic gases, and oxygen depletion. This type of device is used widely in industry and can be found in a variety of locations such as on oil rigs, to monitor manufacture processes and emerging technologies such as photovoltaic.They may also be used in firefighting.
Gas detectors are usually battery operated. They transmit warnings via a series of audible and visible signals such as alarms and flashing lights, when dangerous levels of gas vapors are detected. As detectors measure a gas concentration, the sensor responds to a calibration gas, which serves as the reference point or scale. As a sensor’s detection exceeds a preset alarm level, the alarm or signal will be activated. As units, gas detectors are produced as portable or stationary devices. Originally, detectors were produced to detect a single gas, but modern units may detect several toxic or combustible gases, or even a combination of both types.
The European Community has supported a research called the MINIGAS project that was coordinated by VTT Technical Research Center of Finland.[2] This research project aims to develop new types of photonics-based gas sensors, and to support the creation of smaller instruments with equal or higher speed and sensitivity than conventional laboratory-grade gas detectors.
Figure: Symbol
FEATURES:
Wide detecting scope
Fast response and High sensitivity
Stable and long life
APPLICATION:
They are used in gas leakage detecting equipments in family and industry, are suitable for detecting of LPG, i-butane, propane, methane ,alcohol, Hydrogen, smoke.
TEMPERATURE SENSOR:
Thermistors are inexpensive, easily-obtainable temperature sensors. They are easy to use and adaptable. Circuits with thermistors can have reasonable output voltages not the mill-volt outputs thermocouples have. Because of these qualities, thermistors are widely used for simple temperature measurements.
General Description
The LM35 series are precision integrated-circuit temperature sensors, whose output voltage is linearly proportional to the Celsius (Centigrade) temperature. The LM35 thus has an advantage over linear temperature sensors calibrated in °Kelvin, as the user is not required to subtract a large constant voltage from its output to obtain convenient Centigrade scaling. The LM35 does not require any external calibration or trimming to provide typical accuracies of ±1⁄4°C at room temperature and ±3⁄4°C over a full −55 to +150°Ctemperature range. Low cost is assured by trimming and calibration at the wafer level. The LM35’s low output impedance, linear output, and precise inherent calibration make interfacing to readout or control circuitry especially easy. It can be used with single power supplies, or with plus and minus supplies. As it draws only 60 μA from its supply, it has very low self-heating, less than 0.1°C in still air. The LM35 is rated to operate over a −55° to +150°C temperature range, while the LM35C is rated for a −40° to +110°C range (−10°with improved accuracy). The LM35 series is available packaged in hermetic TO-46 transistor packages, while theLM35C, LM35CA, and LM35D are also available in the plastic TO-92 transistor package. The LM35D is also available in an 8-lead surface mount small outline package and a plastic TO-220 package.
Features:
• Calibrated directly in ° Celsius (centigrade)
• Non linear + 10.0 mv/°c scale factor
• 0.5°c accuracy guarantee able (at +25°c)
• Rated for full −55° to +150°c range
• Suitable for remote applications
• Low cost due to wafer-level trimming
• Operates from 4 to 30 volts
• Less than 60 μa current drain
ARM7TDMI PROCESSOR
GENERAL DESCRIPTION:
The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combine microcontroller with embedded high speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, LPC2141/42/44/46/48 are ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. Serial communications interfaces ranging from a USB 2.0 Full-speed device, multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM of 8 kB up to 40 kB, make these devices very well suited for communication gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both large buffer size and high processing power. Various 32-bit timers, single or dual 10-bit. ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these microcontrollers suitable for industrial control and medical systems.
FEATURES:
• 16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
• 8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash
• memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation.
• In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot
• loader software. Single flash sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms
• Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip Real Monitor software and high-speed tracing of instruction execution.
• USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM. In addition, the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA.
• One or two (LPC2141/42 vs. LPC2144/46/48) 10-bit ADCs provide a total of
6/14 analog inputs, with conversion times as low as 2.44 μs per channel.
• Single 10-bit DAC provides variable analog output (LPC2142/44/46/48 only).
• Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.
• Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.
• Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
• Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.
• Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package,.
• Up to 21 external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with Settling time of 100 μs.
• On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz.
• Power saving modes include Idle and Power-down.
• Individual enable/disable of peripheral functions as well as peripheral clock
scaling for additional power optimization.
• Processor wake-up from Power-down mode via external interrupt or BOD.
• Single power supply chip with POR and BOD circuits
• CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V
tolerant I/O pads.
4.4 FUNCTIONAL DESCRIPTION:
4.4.1 ARCHITECTURE OVERVIEW:
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed Complex Instruction Set Computers (CISC). This simplicity results in a high instruction throughput and impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as Thumb, which makes it ideally suited to high-volume applications with memory restrictions, or applications where code density is an issue.The key idea behind Thumb is that of a super-reduced instruction set.
THE ARM7TDMI-S PROCESSOR HAS TWO INSTRUCTION SETS:
• The standard 32-bit ARM set.
• A 16-bit Thumb set.
The Thumb set’s 16-bit instruction length allows it to approach twice the density of standard ARM code while retaining most of the ARM’s performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because Thumb code operates on the same 32-bit register set as ARM code.Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the performance of an equivalent ARM processor connected to a 16-bit memory system.The particular flash implementation in the LPC2141/42/44/46/48 allows for full speed execution also in ARM mode. It is recommended to program performance critical and short code sections (such as interrupt service routines and DSP algorithms) in ARM mode. The impact on the overall code size will be minimal but the speed can be increased by 30% over Thumb mode.
ON-CHIP FLASH MEMORY:
The LPC2141/42/44/46/48 incorporate a 32 kB, 64 kB, 128 kB, 256 kB and 512 kB flash memory system respectively. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be programmed In System via the serial port. The application program may also erase and/or program the flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc. Due to the architectural solution chosen for an on-chip boot loader, flash memory available for user’s code on LPC2141/42/44/46/48 is 32 kB, 64 kB, 128 kB, 256 kB and 500 kB respectively.The LPC2141/42/44/46/48 flash memory provides a minimum of 100,000 erase/write cycles and 20 years of data-retention.
ON-CHIP STATIC RAM:
On-chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8-bit, 16-bit, and 32-bit. The LPC2141, LPC2142/44 and LPC2146/48
provide 8 kB, 16 kB and 32 kB of static RAM respectively. In case of LPC2146/48 only, an 8 kB SRAM block intended to be utilized mainly by the USB can also be used as a general purpose RAM for data storage and code storage and execution.
INTERRUPT CONTROLLER:
The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted.
Fast interrupt request (FIQ) has the highest priority. If more than one request isassigned to FIQ, the VIC combines the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine does not need to branch into the interrupt service routine but can run from the interrupt vector location. If more than one request is assigned to the FIQ class, the FIQ service routine will read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt.
Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be
assigned to this category. Any of the interrupt requests can be assigned to any of the 16 vectored IRQ slots, among which slot 0 has the highest priority and slot 15 has the
lowest. Non-vectored IRQs have the lowest priority.
The VIC combines the requests from all the vectored and non-vectored IRQs to produce the IRQ signal to the ARM processor. The IRQ service routine can start by reading a register from the VIC and jumping there. If any of the vectored IRQs are pending, the VIC provides the address of the highest-priority requesting IRQs service routine, otherwise it provides the address of a default routine that is shared by all the non-vectored IRQs. The default routine can read another VIC register to see what IRQs are active
INTERRUPT SORCES:
Each peripheral device has one interrupt line connected to the Vectored Interrupt
Controller, but may have several internal interrupt flags. Individual interrupt flags may also represent more than one interrupt source.
PIN CONTROL BLOCK:
The pin connect block allows selected pins of the microcontroller to have more than one function. Configuration registers control the multiplexers to allow connection between the pin and the on chip peripherals. Peripherals should be connected to the appropriate pins prior to being activated, and prior to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is not mapped to a related pin should be consideredundefined.
The Pin Control Module with its pin select registers defines the functionality of the
microcontroller in a given hardware enviroment. After reset all pins of Port 0 and 1 are configured as input with the following exceptions: If debug is enabled, the JTAG pins will assume their JTAG functionality; if trace is enabled, the Trace pins will asume their trace functionality. The pins associated with the I2C0 and I2C1 interface are open drain.
FAST GENERAL PURPOSE PARALLEL I/O (GPIO):
Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate registers allow setting or clearing any number of outputs simultaneously. The value of the output register may be read back, as well as the current state of the port pins. LPC2141/42/44/46/48 introduce accelerated GPIO functions over prior LPC2000
DEVICES:
• GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing.
• Mask registers allow treating sets of port bits as a group, leaving other bits
Unchanged.
• All GPIO registers are byte addressable.
• Entire port value can be written in one instruction
FEATURES:
• Bit-level set and clear registers allow a single instruction set or clear of any number of bits in one port.
• Direction control of individual bits.
• Separate control of output set and clear.
• All I/O default to inputs after reset.
10-BIT ADC:
The LPC2141/42 contain one and the LPC2144/46/48 contain two analog to digital converters. These converters are single 10-bit successive approximation analog to digital converters. While ADC0 has six channels, ADC1 has eight channels. Therefore, total number of available ADC inputs for LPC2141/42 is 6 and for LPC2144/46/48 is 14.
FEATURES:
• 10 bit successive approximation analog to digital converter.
• Measurement range of 0 V to VREF (2.0 V ≤ VREF ≤ VDDA).
• Each converter capable of performing more than 400,000 10-bit samples per second.
• Every analog input has a dedicated result register to reduce interrupt overhead.
• Burst conversion mode for single or multiple inputs.
• Optional conversion on transition on input pin or timer match signal.
• Global Start command for both converters (LPC2142/44/46/48 only).
10-BIT DAC:
The DAC enables the LPC2141/42/44/46/48 to generate a variable analog output. The maximum DAC output voltage is the VREF voltage.
Features:
• 10-bit DAC.
• Buffered output.
• Power-down mode available