28-06-2014, 02:30 PM
Analysis of a Four-Level DC/DC Buck Converter
Analysis of a Four-Level DCDC Buck Converter.pdf (Size: 264.49 KB / Downloads: 125)
Abstract
In this paper, a four-level dc/dc buck converter is
introduced. The primary application for this converter is to
regulate the center capacitor voltage in a four-level inverter system.
The steady-sate and average-value models for the proposed
converter are developed and compared in simulation. The
converter was constructed in the laboratory and verified on a four-
level motor drive system. It was shown that the four-level dc/dc
converter provides capacitor voltage balancing and allows higher
output voltage utilization from the inverter.
INTRODUCTION
The general trend in power electronics devices has been to
switch power semiconductors at increasingly high frequencies in
order to minimize harmonics and reduce passive component
sizes. However, the increase in switching frequency increases
the switching losses, which become especially significant at high
power levels. Several methods for decreasing switching losses
have been proposed including constructing resonant inverters
and multi-level inverters [1].
Resonant inverters avoid switching losses by adding an LC
resonant circuit to the hard-switched inverter topology. The
inverter transistors can be switched when their voltage or current
is zero, thus mitigating switching losses. Examples of this type
of inverter include the resonant DC link [2], and the Auxiliary
Resonant Commutated Pole inverter (ARCP) [3,4]. One
disadvantage of resonant inverters is that the added resonant
circuitry will increase the complexity and cost of the inverter
control. Furthermore, high IGBT switching edge rates can
create switch level control problems
STEADY-STATE MODELING
As with other types of DC/DC converters, it is instructive to
perform a steady-state analysis of the converter driving a
resistive load [18-20,23]. Figure 4 shows the topology for this
analysis. If continuous current operation is assumed, the
inductor current waveform will appear as shown in Fig. 5.
Therein, the current iLx represents the current in either inductor
( x may be 1 or 2). This is done since the current in both
inductors is identical if the inductors are matched and the load is
symmetrical. The current slopes are depicted in Fig. 5, which
represent the inductor voltage divided by L . The average
current ILx as well as the maximum current Imax x and
minimum current Imin x are also defined. The analysis begins
by setting the average inductor voltage to zero resulting in
FOUR-LEVEL INVERTER
Figure 10 illustrates a four-level diode clamped inverter [6-
8,12,13]. The general theory of this inverter is that each phase
(a, b, or c) can be electrically connected to the junctions d0 , d1 ,
d2 , and d3 by appropriate switching of the inverter transistors.
By pulse-width modulation, the inverter line-to-ground voltages
vag , vbg , and vcg can be directly controlled. The motor lineto-
neutral voltages can be calculated from the line-to-ground
voltages by [
FOUR-LEVEL SYSTEM LABORATORY STUDIES
The system shown in Fig. 2 was constructed in the laboratory.
The motor load was an 18kW induction motor loaded by a
synchronous generator. For the studies that follow, the dc
voltage was vdc = 660V and the modulation parameters were
f * =100Hz and m =1.04 . The buck converter inductance,
capacitance, and switching period were the same as with the
simulation studies.
Figure 11 shows the motor line-to-line voltage and the a-
phase current. As can be seen, the voltage waveform exhibits
the typical four-level inverter shape [8]. As stated before, the
buck converter regulated the center capacitor and the upper and
lower capacitors were balanced by redundant state selection
within the inverter [13]. In this study, the capacitor voltages
were vc1 = 225.3V , vc2 = 225.0V , and vc3 = 225.1V .
Figure 12 shows the buck converter semiconductor voltages
and inductor current as labeled in Fig. 2. As can be seen, the
semiconductor voltages have some oscillation when they are
gated off due to oscillation in the dc link voltage that existed in
this particular system. The low-frequency oscillation has a
noticeable effect on the inductor current. From the transistor and
diode voltage waveforms, it can be seen that the voltage shares
evenly when the devices are gated off
CONCLUSION
This paper has presented an analysis of a four-level dc/dc
buck converter, which is designed to supply a four-level inverter.
Detailed and average-value models were developed. A
computer simulation showed that the average-value model
accurately predicted the dynamics of the buck converter when
compared to the detailed model. The new converter was
constructed in the laboratory and tested on a four-level motor
drive. It was demonstrated that the buck converter was
necessary for regulating the capacitor voltages at a high
modulation index