14-02-2013, 04:54 PM
Architecture of Field-Programmable Gate Arrays
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ABSTRACT
A survey of Field-Programmable Gate Array (FPGA) architectures
and the programming technologies used to customize them is
presented. Programming technologies are compared on the basis of
their vola fility, size, parasitic capacitance, resistance, and process
technology complexity. FPGA architectures are divided into two
constituents: logic block architectures and routing architectures.
A classijcation of logic blocks based on their granularity is
proposed and several logic blocks used in commercially available
FPGA ’s are described. A brief review of recent results on the effect
of logic block granularity on logic density and pe$ormance of an
FPGA is then presented. Several commercial routing architectures
are described in the contest of a general routing architecture
model. Finally, recent results on the tradeoff between the fleibility
of an FPGA routing architecture its routability and density are
reviewed.
INTRODUCTION
The architecture of a field-programmable gate array
(FPGA), as illustrated in Fig. 1, is similar to that of
a mask-programmable gate array (MPGA), consisting of
an array of logic blocks that can be programmably
interconnected to realize different designs. The major
difference between FPGA’s and MPGA’s is that an MPGA
is programmed using integrated circuit fabrication to form
metal interconnections, while an FPGA is programmed
via electrically programmable switches much the same as
traditional programmable logic devices (PLD’s). FPGA’s
can achieve much higher levels of integration than PLD’s,
however, due to their more complex routing architectures
and logic implementations.
PROGRAMMITNEGC HNOLOGIES
An FPGA is programmed using electrically programmable
switches. The properties of these programmable
switches, such as size, on-resistance, and capacitance,
dictate many of the tradeoffs in FPGA architecture. In this
section we describe the most commonly used programmable
switch technologies and at the end will contrast each
technology with respect to volatility, re-programmability,
size, series on-resistance, parasitic capacitance, and process
technology complexity.
Antifuse Programming Technology
An antifuse is a two terminal device with an unprogrammed
state presenting a very high resistance between
its terminals. When a high voltage (from 11 to 20 volts,
depending on the type of antifuse) is applied across its
terminals the antifuse will “blow” and create a lowresistance
link. This link is permanent. Antifuses in use
today are built either using an Oxygen-Nitrogen-Oxygen
(ONO) dielectric between N+ diffusion and poly-silicon
[ 191, [ 151, [ 11 or amorphous silicon between metal layers
[6] or between polysilicon and the first layer of metal [31].
Programming an antifuse requires extra circuitry to deliver
the high programming voltage and a relatively high
current of 5 mA or more. This is done in [15] through
fairly sizable pass transistors to provide addressing to each
antifuse. An associated paper in this issue discusses the
programming of antifuse structures in more detail [18].
Antifuse technology is used in the FPGA’s from Actel [ 151
[I], Quicklogic [6], and Crosspoint [31].
LOGIC BLOCKARCHITECTURE
In this section we survey the commercial FPGA logic
block architectures in use today. In the first section we
discuss the combinational logic portion of the logic block.
A discussion of the sequential logic portion is deferred to
Section 111-D. In Section 111-E, we present several recent
research results on the effect of the choice of the logic
block on the density and performance of an FPGA.
A. Survey of Commercial Logic Block Architectures
FPGA logic blocks differ greatly in their size and implementation
capability. The two transistor logic block used
in the Crosspoint FPGA can only implement an inverter
but is very small in size, while the look-up table logic
block used in the Xilinx 3000 series FPGA can implement
any five-input logic function but is significantly larger. To
capture these differences we classify logic blocks by their
granularity. Granularity can be defined in various ways,
for example, as the number of boolean,