08-12-2012, 03:34 PM
CSL718 : Architecture of High Performance Systems
Architecture of High.ppt (Size: 658.5 KB / Downloads: 34)
Why Superscalars are popular ?
Binary code compatibility among scalar & superscalar processors of same family
Same compiler works for all processors (scalars and superscalars) of same family
Assembly programming of VLIWs is tedious
Code density in VLIWs is very poor - Instruction encoding schemes
Data Parallel Architectures
SIMD Processors
Multiple processing elements driven by a single instruction stream
Vector Processors
Uni-processors with vector instructions
Associative Processors
SIMD like processors with associative memory
Systolic Arrays
Application specific VLSI structures
Issues from user’s perspective
Specification / Program design
explicit parallelism or
implicit parallelism + parallelizing compiler
Partitioning / mapping to processors
Scheduling / mapping to time instants
static or dynamic
Communication and Synchronization
Cache Coherence Problem
Multiple copies of data may exist
Problem of cache coherence
Options for coherence protocols
What action is taken?
Invalidate or Update
Which processors/caches communicate?
Snoopy (broadcast) or directory based
Status of each block?
Interconnection Networks
Architectural Variations:
Topology
Direct or Indirect (through switches)
Static (fixed connections) or Dynamic (connections established as required)
Routing type store and forward/worm hole)
Efficiency:
Delay
Bandwidth
Cost