16-01-2013, 03:52 PM
Threshold Logic for Nanotechnologies
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MOBIILEs
Monostable-bistable transition logic element (MOBILE): a resonant
tunneling diode (RTD) and heterostructure field-effect transistor
(HFET) nanotechnology based threshold element
• Rising edge-triggered, current-controlled gate
• Serially-connected load and driver RTDs
• RTD-HFET structures in parallel to the load (driver) RTDs perform positive
(negative) weighting of inputs
• Area of RTDs: corresponds to weight
• Difference in the areas of the driver and load RTDs: threshold
Capabilities and Limitations of Threshold
Logic
Threshold gate: generalization of conventional gates
• More powerful than conventional gates because it can realize a larger
class of functions
• Any conventional gate can be realized with a threshold gate
• Thus, threshold gates are functionally complete
IImporrttantt Concllusiions
If a function is realizable using a single threshold element, then by an
appropriate choice of complemented and uncomplemented input
variables: a realization with any sign distribution is possible
Identification and Realization of Threshold
Functions
Procedure:
1. Test the given function f for unateness
2. If it is unate, convert it into another function g that is positive in all its variables
3. Find all minimal true and maximal false vertices of g
4. Derive and solve a system of pq inequalities, corresponding to the p minimal
true and q maximal false vertices
Map-based Synthesis of Two-level
Threshold Networks
Decomposition of non-threshold functions: into two or more factors that are
threshold functions
Admissible pattern: a pattern of 1 cells that can be realized by a single
threshold element
• An admissible pattern may be in any position on the map
• An admissible pattern for functions of three variables is also an admissible
pattern for functions of four or more variables
• Since the complement of a threshold function is also a threshold function,
patterns of 0 cells are also admissible
• Select a minimal number of admissible patterns such that each 1 cell is
covered by at least one admissible pattern
Generrall Syntthesiis Prrocedurre
Procedure:
1. Start with a multi-output algebraically-factored switching network G
2. Process each primary output of G
• If the node represents a binate function, split into multiple nodes and
process recursively
• If the node is unate and is also a threshold function, save it in the
threshold network and process its input nodes recursively
• Else, split the unate node into two or more nodes that are
threshold functions
3. Terminate procedure when all the nodes in G are mapped to threshold
nodes