22-12-2012, 06:43 PM
DIGITAL NUMBER LOCKING SYSTEM
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ABSTRACT
The proposed project is DIGITAL NUMBER LOCKING SYSTEM for electrical
And electronics gadgets.The principle used is similar to suit case locking
System.the system is controlled by a pre coded number ranging from 001
To 999 given by the user to lock the system.
During un lock the sensing device(relay),compares the coded
number with the pre coded one and un locks the system if and only if
The coded number is same as that of pre coded one.
Operating principle
The timer is used as clock in put for all counters. Johnson counter has ten decoded
outputs. The system can be locked by connecting three inputs of AND gate to any
of these decoded out put. Here three counters are used. Hence the decoding number
ranges from 111 to 999. Decade counter is seven segment LED driver.
To un lock the system, the decoding number is entered that is the number
Of clock pulses are passed to the counters through the switches provided. The
corresponding number will be displayed. If the entered number is correct, output of
AND gate goes high and the transistor starts conducting. Hence the relay will operate
And the system will get ON.
CIRCUIT DISCRIPTION
The circuit consists of a 555 timer, which is operated astable multi vibrator mode and is
designed for 66.6% duty cycle and clock period of about one second. The output of this
timer is used as clock for decade counter (cd 4033) and for Johnson counter(4017).
The decade counter and Johnson counters are paired together to form
Three pairs of IC-2 , IC-5 & IC-3,IC-6&IC-4,IC-7.Tlock to these pairs is given through
push –to-on switches S1,S2,S3 respectively. The three sets function independently
with reset pin -15 of IC-2 to IC-7 tied together. On reset ,only the y0 output of the
Johnson ring counters are high while all the other out puts are low(y1 to y9)
At this instant the out put of all decade counters correspond to zero count and display
is “000” on three displays.
When the first clock pulse is applied to any of these three pairs ,the high
Out put of Johnson counter shifts from y0 to y1,at the same time the count on its paired
Decade counter advances from zero to one and corresponding seven segment also
Dispays “1”. For the second clock pulse , the high level shifts to y2 and display shows
“2”. The count is incremented at every clock pulse and this can be incremented up to
Nine clock pulses or ‘9” on the display . When nine clock pulses are passed the output
Y9 will be high. On the next clock pulse ,output y0 again goes high and the display
Shows “0”. Thus the cycle repeats.
The outputs of IC-5,IC-6 and IC-7 are connected to the three input AND
Gate (IC-8).Depending upon the desired code for the appliance’s operation
Corresponding connections can be made from the out put of john son counter to AND
Gate.
When all the three inputs to the “AND” gate are high the out put goes high that is when
The code is decoded correctly ,the out put of “AND” gate goes high .Out put of AND
gate is given to the base of the transistor . When the base goes high , the transistor
starts conducting and relay gets energized .Relay gets thatched as it receives the
positive supply through transistor and gets grounded through one of its N/O contacts.
IC 4033 GENERAL DISCRIPTION
The IC 4033 consists of Johnson decade counter and an output decoder
Which converts the john son code to 7 segment de coded out put for driving each stage
in numerical display.
The inputs are CLOCK ,RESET and CLOCK INHIBIT and outputs are
CARRY OUT and decoded outputs(a,b,c,d,e,f,g). A high RESET clears the decade
Counter to its zero count. The counter is advanced one count at the positive clock signal
Transition if the clock inhibit signal is low. Counter advancement via the clock line is
Inhibited when the clock inhibit signal is high. The carry out signals completed one cycle
every ten clock input cycles and is used to clock the succeeding directory in a multi-
decade counting chain.
The seven decoded outputs(a,b,c,d,e,f,g) illuminate the proper segments
In seven segment display device used for representing the decimal number 0 to 9.
JOHNSON COUNTER
For a given mod counter ,a Johnson counter requires only half a number of flip flops
That a ring counter does not .As in a binary counter , the Johnson counter uses logic
Gate to decode for each count , but each gate requires only the in puts, regardless of
the number of flip flops in the counter.
Note that each decoding gate has only two inputs ,even though there are three
flip flops in the counter. This is because for each count ,two of three FFs are in a unique
combination of states.EX:the combination Q2=Q3=0 occurs once in the counting
sequence,at the count of 0.Thus AND gate 0 with inputs Q2 and Q0 can be used to
decode for this count. The same characteristic is showed by all the other states in the
sequence, as the reader can verify. Q fact for any size Johnson counter , the decoding
gates will have only two inputs.