13-09-2013, 02:38 PM
CMOS Inverter, NAND and NOR using PSPICE
Aim:
To plot the transient characteristics of output voltage for the given CMOS inverter,
NAND and NOR from 0 to 80s in steps of 1s. To calculate the voltage gain, input
impedance and output impedance for the input voltage of 5V.
Theory:
(i) Inverter
CMOS is widely used in digital IC’s because of their high speed, low power
dissipation and it can be operated at high voltages resulting in improved noise immunity.
The inverter consists of two MOSFETs. The source of p-channel device is connected to
+VDD and that of n-channel device is connected to ground. The gates of two devices are
connected as common input.
(ii) NAND
It consists of two p-channel MOSFETs connected in parallel and two n-channel
MOSFETs connected in series. P-channel MOSFET is ON when gate is negative and N-
channel MOSFET is ON when gate is positive. Thus when both input is low and when
either of input is low, the output is high.
(iii) NOR
It consists of two p-channel MOSFETs connected in series and two n-channel
MOSFETs connected in parallel. P-channel MOSFET is ON when gate is negative and
N-channel MOSFET is ON when gate is positive. Thus when both inputs are high and
when either of input is high, the output is low. When both the inputs are low, the output
is high.