29-03-2012, 02:47 PM
CORDIC algorithm verification with Soft Devices in Altium Designer 6
TNE027%20Lab2.pdf (Size: 444.25 KB / Downloads: 115)
Study CORDIC algorithm with MATLAB simulation
1. Copy the MATLAB programs from S:\TN\E\027_Digital_Kommunikationselektronik\CORDIC MATLAB code\ to your own directory.
2. The MATLAB programs simulate the rotation mode of CORDIC algorithm with floating-point computation and integer computation, respectively. Run the programs in MATLAB with various input data and verify that correct results can be obtained.
Testing a VHDL code for a pipelined implementation of CORDIC
1. Copy the VHDL files for CORDIC algorithm verification from S:\TN\E\027_Digital_Kommunikationselektronik\CORDIC VHDL code\ to your own directory.
2. Create a new FPGA project by clicking on File » New » Project » FPGA » Project and rename the new project file by clicking on File » Save Project As.
3. Create a schematic source document.
4. Add the VHDL file Cordic.Vhd to the project.
5. Create a new sheet symbol from the VHDL file by selecting Design » Create Sheet Symbol from Sheet Or HDL.
6. Place the following components on the schematic from FPGA EvalBoard Port-Plugin.IntLib:
a. TEST_BUTTON
b. CLOCK_BOARD
c. NEXUS_JTAG_CONNECTOR
Improve the implementation
Improve the accuracy of the CORDIC VHDL code by changing the VHDL code. You may consider the following improvements:
1. Increase the accuracy of the angle values to be accumulated at each stage.
2. Increase the number of pipeline stages.
You should use the MATLAB simulation to help you determine the parameters and improve the design.
Display the results with 7-segment display modules
Write a VHDL code for converting 4-bit binary values to 7-bit input values for 7-segment display modules. The design should display the x and y results of the CORDIC implementation on the 7-segment display modules.
Optional Part 2: Implement the CORDIC state machine
Implement the CORDIC state machine as given in Fig. 2.38 on page 99 of the text book.
Simulate the VHDL code by using a simulator
Read Chapter 11 of the file Training Module 5 FPGA Design.pdf in the directory S:\TN\E\027_Digital_Kommunikationselektronik\Altium Manuals and Tutorials\. An example for Simulation of the CORDIC VHDL code is given in the file