05-10-2016, 12:03 PM
1457868349-ChipMorphingSeminarTopicsReportsandPPT.pdf (Size: 111.55 KB / Downloads: 5)
Abstract
Engineering is a study of tradeoffs. In computer engineering the tradeoff has traditionally been between
performance, measured in instructions per second, and price. Because of fabrication technology, price is
closely related to chip size and transistor count. With the emergence of embedded systems, a new
tradeoff has become the focus of design.
This new tradeoff is between performance and power or energy consumption. The computational
requirements of early embedded systems were generally more modest, and so the performancepower
tradeoff tended to be weighted towards power. "High performance" and "energy efficient" were generally
opposing concepts.
Description of Chip Morphing
However, new classes of embedded applications are emerging which not only have significant energy
constraints, but also require considerable computational resources. Devices such as space rovers, cell
phones, automotive control systems, and portable consumer electronics all require or can benefit from
highperformance processors. The future generations of such devices should continue this trend.
Processors for these devices must be able to deliver high performance with low energy dissipation.
Additionally, these devices evidence large fluctuations in their performance requirements. Often a device
will have very low performance demands for the bulk of its operation, but will experience periodic or
asynchronous "spikes" when highperformance is needed to meet a deadline or handle some interrupt
event.
These devices not only require a fundamental improvement in the performance power tradeoff, but also
necessitate a processor which can dynamically adjust its performance and power characteristics to
provide the tradeoff which best fits the system requirements at that time.
1.2. Fast, Powerful but Cheap, and Lots of Control
These motivations point to three major objectives for a power conscious embedded processor. Such a
processor must be capable of high performance, must consume low amounts of power, and must be able
to adapt to changing performance and power requirements at runtime.
The objective of this seminar is to define a microarchitecture which can exhibit low power consumption
without sacrificing high performance. This will require a fundamental shift to the powerperformance curve
presented by traditional microprocessors. Additionally, the processor design must be flexible and reconfigurable at runtime so that it may present a series of configurations corresponding to different
tradeoffs between performance and power consumption.
1.3. MORPH
These objectives and motivations were identified during the MORPH project, a part of the Power Aware
Computing / Communication (PACC) initiative. In addition to exploring several mechanisms to
fundamentally improve performance, the MORPH project brought forth the idea of "gear shifting" as an
analogy for runtime reconfiguration.
Realizing that real world applications vary their performance requirements dramatically over time, a major
goal of the project was to design microarchitectures which could adjust to provide the minimal required
performance at the lowest energy cost. The MORPH project explored a number of microarchitectural
techniques to achieve this goal, such as morphable cache hierarchies and exploiting bitslice inactivity.
One technique, multicluster architectures, is the direct predecessor of this work. In addition to
microarchitectural changes, MORPH also conducted a survey of realistic embedded applications which
may be power constrained. Also, design implications of a power aware runtime system were explored.