30-03-2012, 03:03 PM
Serial Data Transmission
CH11_Slides.pdf (Size: 1.08 MB / Downloads: 131)
Main Sections of Behavioral Code for CPU:
1. Signal and control declarations;
2. Procedure ALU_OP, which performs ALU operations for register-memory
instructions including all two-operand instructions;
3. Procedure ALU_1, which performs ALU and shifting operations for read-modifywrite
instructions, which have a single operand;
4. Procedure fill_memory, which fills the memory with instructions and data for
test purposes;
5. Process cpu_cycles, which specifies the state sequence for the CPU controller
and the actions which occur in each state.
Examples of 4-bit codes for opcodes and addressing modes:
-- lower 4 bits of opcode (specifies operation)
subtype ot is std_logic_vector(3 downto 0);
constant SUB: ot:="0000"; constant CMP: ot:="0001";
...
-- upper 4 bits of opcode (specifies addressing mode)
constant REL: ot:="0010"; constant DIRM: ot:="0011";
Summary of steps used to design CPU:
1. Define the register structure, instruction set, and addressing modes.
2. Construct a table which shows the register transfers that take place during each
clock cycle.
3. Design the control state machine.
4. Write behavioral VHDL code based on (1), (2), and (3). Simulate execution of
the instructions to verify that specifications are met.
5. Work out block diagrams for the major components of the CPU and determine
the needed control signals.
6. Rewrite the VHDL based on (5). Again, simulate execution of the instructions.
7. Synthesize the CPU from the VHDL code. Make changes in the VHDL code as
needed to improve the synthesis results.
...