17-05-2012, 04:34 PM
DIFFERENT MULTIPLIERS USING VHDL
mtech mini proj abstract.doc (Size: 41.5 KB / Downloads: 35)
Low power consumption and smaller area are some of the most important criteria for the fabrication of DSP systems and high performance systems. Optimizing the speed and area of the multiplier is a major design issue. However, area and speed are usually conflicting constraints so that improving speed results mostly in larger areas.
In our project we try to determine the best solution to this problem by comparing a few multipliers. In this project we compare the working of the three multiplier by designing each of them separately. When we compare the power consumption of all the multipliers we find that serial multipliers consume more power than parallel multipliers. In this project we first designed three different types of multipliers like Booth multiplier, Wallace tree multiplier and Vedic multiplier and compare their features.
The result of our project helps us to choose a better option between different multipliers in fabricating different systems. Multipliers form one of the most important components of many systems. So by analyzing the working of different multipliers helps to frame a better system with less power consumption and lesser area.
Booth's multiplication algorithm is a multiplication algorithm that multiplies two signed binary numbers in two's complement notation. The algorithm was invented by Andrew Donald Booth in 1951 while doing research on crystallography at Birkbeck College in Bloomsbury, London. ==Procedure== the value of (−m) in two's complement notation. Fill the remaining (y + 1) bits with zeros.
Wallace Tree Multiplier
The Wallace tree has three steps:
-Multiply (that is - AND) each bit of one of the arguments, by each bit of the other, yielding n2 results. Depending on position of the multiplied bits, the wires carry different weights, for example wire of bit carrying result of a2b3 is 32 (see explanation of weights below).
-Reduce the number of partial products to two by layers of full and half adders.
Vedic Multiplier
The proposed Vedic multiplier is based on the Vedic multiplication formulae (Sutras). These Sutras have been traditionally used for the multiplication of two numbers in the decimal number system. In this work, we apply the same ideas to the binary number system to make the proposed algorithm compatible with the digital hardware. Vedic multiplication based on Urdhava Tiryakbhyam is used here.