27-11-2012, 05:14 PM
Design & Implementation of ECAT To Achieve Low Error & High Throughput DA-Based
Design & Implementation.pptx (Size: 598.61 KB / Downloads: 60)
DCT-(Introduction)
Introduction to the DCT and IDCT.
Decomposition of a 2-D DCT to two 1-D DCTs.
Implementation of a 2-D DCT using a 1-D DCT.
To perform the JPEG coding, an image (in colour or grey scales) is first subdivided into blocks of 8x8 pixels.
The Discrete Cosine Transform (DCT) is then performed on each block.
This generates 64 coefficients which are then quantised to reduce their magnitude.
The coefficients are then reordered into a one-dimensional array in a zigzag manner before further entropy encoding.
The compression is achieved in two stages; the first is during quantisation and the second during the entropy coding process.
JPEG decoding is the reverse process of coding.
Why DA ?
The advantages of DA are best exploited in data-path circuit designing
Area savings from using DA can be up to 80% and seldom less than 50% in digital signal processing hardware designs
An old technique that has been revived by the wide spread use of Field Programmable Gate Arrays (FPGAs) for Digital Signal Processing (DSP)
DA efficiently implements the MAC using basic building blocks (Look Up Tables) in FPGAs
How does DA work?
The “basic” DA technique is bit-serial in nature
DA is basically a bit-level rearrangement of the multiply and accumulate operation
DA hides the explicit multiplications by ROM look-ups an efficient technique to implement on Field Programmable Gate Arrays (FPGAs)
What is Distributed Arithmetic?
DA is a bit-serial technique to greatly reduce resource requirements for the dot product calculation
So-called because the resources are not easily recognizable: “Where’s the MAC module?”
Takes advantage of small tables of pre-computed coefficients and clever rearrangement of the math
Why use Distributed Arithmetic?
In signal processing the most common operation is the dot product
DA lends itself well to FPGA implementation due its use of lookup tables
DA can reduce gate count by 50%-80% in signal processing arithmetic!
Future scope of the Work
This work can improved by implementing JPEG 2000 Image compression standard in which ordinary DCT transformation part can be replaced by our Distributed Arithmetic Discrete Cosine Transform(DA DCT) Design.
The 8-Point Distributed Arithmetic Discrete Cosine Transform(DA DCT) Design can be made to 16, 32-point Distributed Arithmetic Discrete Cosine Transform(DA DCT) by making minor modifications to the code.
This work can be extended in order to increase the accuracy by increasing the level of transformations.
This can be used as a part of the block in the full fledged application, i.e., by using these DA DCT, the applications can be developed such as compression, watermarking, etc.
Conclusion
The Distributed Arithmetic Discrete Cosine Transform (DA DCT) was designed successfully and the coding was done in Verilog HDL. The RTL simulations were performed using ModelSim III XE 6.4b from Mentor Graphics. The synthesis was done using Xilinx ISE 10.1. DA DCT Design is verified for all test cases. The DA DCT works properly for all the test values