21-01-2013, 12:47 PM
Design and Simulation of 8255 Programmable Peripheral Interface Adapter Using VHDL
1Design and Simulation.pdf (Size: 437.64 KB / Downloads: 115)
Abstract
The 8255A programmable peripheral interface (PPI) implements
a general-purpose I/O interface to connect peripheral
equipment to a microcomputer system bus. The core's functional
configuration is designed by VHDL code and designed input
signal (Test bench) for PPI 8255, which is generated by VHDL
code. Simulated result is verified for three 8-bit Peripheral Ports
- Ports A, B, and C , three programming modes for Peripheral
Ports: Mode 0 (Basic Input/Output), Mode 1 (Strobed Input/
Output), and Mode 2 (Bidirectional), total of 24 programmable
I/O lines .Also verified simulated and synthesized result for PPI
8255. All designed is done by using Xilinx ISE9.1 i.
Introduction
The 8255 PPI
The 8255 Programmable Peripheral Interface chip is a peripheral
chip originally developed for the Intel 8085 microprocessor, and
as such is a member of a large array of such chips, known as the
MCS-85 Family. This chip was later also used with the Intel 8086
and its descendants. It was later made (cloned) by many other
manufacturers. It is made in DIP 40 and PLCC 44 pins encapsulated
versions. This chip is used to give the CPU access to programmable
parallel I/O, and is similar to other such chips like the Motorola
6520 PIA (Peripheral Interface Adapter) the MOS Technology
6522 (Versatile Interface Adapter) and the MOS Technology CIA
(Complex Interface Adapter) all developed for the 6502 family.
Other such chips are the 2655 Programmable Peripheral Interface
from the Signe tics 2650 family of microprocessors, the 6820
PIO (Peripheral Input/output) from the Motorola 6800 family, the
Western Design Center WDC 65C21, an enhanced 6520, and many
others. The 8255 is widely used not only in many microcomputer/
microcontroller systems especially Z-80 based, home computers
such as SV-328 and all MSX, but also in the system board of
the best known original IBM-PC, PC/XT, PC/jr, etc. and clones.
However, most often the functionality the 8255 offered is now not
implemented with the 8255 chip itself anymore, but is embedded
in a larger VLSI chip as a sub function. The 8255 chip itself is still
made, and is sometimes used together with a micro controller to
expand its I/O capabilities.
About VHDL
In this project we have implemented 8255 PPI test bench
waveform and the coding are done in VHDL language.
VHDL (VHSIC hardware description language) is a hardware
description language used in electronic design automation
to describe digital and mixed-signal systems such as fieldprogrammable
gate arrays and integrated circuits.
VHDL was originally developed at the behest of the U.S
Department of Defense in order to document the behavior of
the ASICs that supplier companies were including in equipment.
That is to say, VHDL was developed as an alternative to huge,
complex manuals which were subject to implementationspecific
details.
Use 8255 PPI in VHDL programming
8255 PPI is used in VHDL; we use VHDL code as in input and to
give the output in simulated test bench waveform. As we know
that, this is also perform in the matlab and P-spice technology
and in this project we are using new advance technology called
VHDL to give simulated test bench waveform of 8255 PPI. The
codes for the different modules are written in VHDL and are
simulated using Xilinx ISE 9.1i.
Programming with 8255 PPI
The 8255 has 3 8-bit ports (A, B and C), each of which can have
a different I/O Status (i.e. input or output). Port C can also be
programmed to operate in two halves. (As two separate 4-bit
ports). The functional configuration of each port is programmed
but the system software. In essence, the CPU "outputs" a control
word to the 8255. The control word contains information such
as "mode", "bit set", "bit reset", etc, that initializes the functional
configuration of the 8255. There are 3 basic modes of operation
under which the ports can function. Mode 0 - Basic Input/
output Mode 1 - Strobed Input/output (Not used by SVI) Mode
2 - Bi-Directional Bus (Not used by SVI) in some of these modes
port C is used as a control/status port for port A or B. It can
be used to confirm when data transfer may take place, and
reflect any other flags. The 8255 PPI is therefore supplied with
the added option for the user to set or reset any individual bits
in port C. The I/O status, mode of operation and bit setting
is defined by the 8255 PPI control byte. (The control byte is
accessed using port 97H, 8255 Control port) The ports may be
accessed separately by the CPU. Port A is accessed using port
98H, Port B is accessed using port 99H, Port C is accessed
using port 96H.
Conclusion
As the application of microprocessors in our technology intensive
environment increases, so does the need for professionals
who are able to utilize, control, interconnect, and troubleshoot
computers. In order to meet the demands of computer-based
organizations, students pursuing an engineering technology
degree program in electronics should develop practical skills in
the areas of computer applications, networking, and interfacing.
The knowledge of interfacing technology, indeed, enhances the
employability skills of engineering technology students. This
project 8255 PPI using VHDL Based upon Simulated Test bench
waveform analysis.