09-07-2012, 11:35 AM
EFFICIENT DESIGN OF BUTTERFLY ARCHITECTURE FOR RADIX 8 FAST FOURIER TRANSFORM USING VHDL
6.Efficient design of butterfly architecture for radix 8 fast Fourier transform using VHDL (6).doc (Size: 130.5 KB / Downloads: 40)
A fast Fourier transform (FFT) is an efficient algorithm to compute the discrete Fourier transform (DFT) and it's inverse. With the advancement in technology and increase in chip density, one has to come with a design having low power characteristics.
This project implements a radix-8 8 point fast Fourier transform (FFT) which is used to separate a signal into its constituent frequencies. This function is useful for a variety of DSP applications including wireless communications, voice recognition, spectrum analysis, noise analysis.
The basic butterfly for mixed-radix 8-2 FFT algorithm.
Employing the parametric nature of this core, the FFT block is synthesized on one of Xilinx’s Vertex-II Pro (2V6000ff1517) FPGAs with different configurations. The results of logic synthesis for 64 point FFT of Radix-2, Radix-4, split Radix, mixed radix 4-2 and Mixed Radix
8-2 are presented in Table 1. The 64-point FFT is chosen to compare the number of CLB slices (responsible to occupy an area in the FPGA).