02-11-2012, 11:50 AM
EIGHT BIT MULTIPLICATION
EIGHT BIT.doc (Size: 36.5 KB / Downloads: 17)
AIM:
To write a verilog program for multiplying two eight bit numbers using Spartan-3E kit.
ALGORITHM:
• Create a verilog file.
• Assign port names.
• Write verilog program.
• Check syntax.
• Create UCF file.
• Assign package pins.
• Connect the Spartan 3E kit using JTag port and configure the device.
• Check on the shift and select program to download the program to FPGA.
• After the program is downloaded check the output using switches and LEDs.
THEORY:
• Assign the clock input to clk and set values to multiplier and multiplicand.
• Check the multiplier &multiplicand are positive, then do the successive addition for the product.
• Otherwise multiplier is positive and multiplicand is negative, then do the successive addition but in successive addition, MSB is replaced by ‘1’ instead of ‘0’.
• If multiplier is negative and multiplicand is positive, then take 2’s compliment of the multiplicand and do the successive addition for that multiplicand.
• If both multiplier &multiplicand are negative, then take 2’s compliment of the multiplicand and do the successive addition, but MSB is replaced by ‘1’ instead of ‘0’.
RESULT:
Thus the program for multiplying two 8-bit numbers was executed and the result was verified using Spartan-3E kit.