17-03-2014, 02:57 PM
ERP-DSSS Clear Channel Assessment Functionality
Purpose:
To verify the device under test (DUT) correctly implements Clear Channel
Assessment functionality for determining the state of the wireless channel.
Resource Requirements:
• Digital Storage Oscilloscope (DSO), Agilent 2400 series or equivalent
• HR/DSSS PHY Station with external antenna jack
• Exposed Clear Channel Assessment (CCA) pin
• Exposed Receive Signal Strength Indicator (RSSI) pin
• Arbitrary Waveform Generator (AWG), Veriwave WT1110 or equivalent
Last updated: April 2008
Discussion:
Reference [1] describes the High Rate direct sequence spread spectrum (HRDS/SS) physical
layer for the 2.4 GHz band. Section 18.4.8 defines the physical medium dependent (PMD)
receiver specifications, and subclause 18.4.8.4 specifies the CCA requirement. The CCA
mechanism is important for controlling access to the wireless medium; each station must regulate
itself, and refrain from accessing the channel according to at least one of the three methods
described in 18.4.8.4. Furthermore, the CCA parameters are governed by the following criteria:
a. If a valid High Rate signal is detected during its preamble within the CCA window,
the ED threshold shall be less than or equal to -76 dBm for TX power > 100 mW; -73
dBm for 50 mW < TX power < 100 mW; and -70 dBm for TX power < 50 mW.
b. With a valid signal (according to the CCA mode of operation) present at the receiver
antenna within 5 μs of the start of a MAC slot boundary, the CCA indicator shall
report channel busy before the end of the slot time. This implies that the CCA signal
is available as an exposed test point. Refer to Figure 9-12 (in 9.2.10) for a slot time
boundary definition.
Procedure
1. Configure the DUT to be receiving on channel 6 at a bit rate of 11 Mbps.
2. Configure the DSO to capture CCA on CH1 and RSSI on CH2.
3. Measure the transmit power level of the DUT.
4. Configure the AWG to a transmit power level equal to the ED threshold defined by the
DUTs measured output power level.
5. Transmit a partial frame consisting of only a SYNC field such that it is present at the
receive antenna within 5 μs of the start of a MAC slot boundary.
6. Observe the RSSI and CCA pins of the DUT.
7. Transmit a valid PLCP header; however, construct a payload whose duration is shorter
than the value specified in the PLCP LENGTH field such that a loss of carrier sense
occurs.
8. Observe the RSSI and CCA pins of the DUT.
9. Repeat steps 1-8 for each possible ED threshold that can be measured.
Observable Results:
a. When the ED threshold is less than or equal to -76 dBm, the CCA should be held low for the
remainder of a slot time in step 5, and be held low for the remainder of the duration field in step
7.
b. When the ED threshold is less than or equal to -73 dBm, the CCA should be held low for the
remainder of a slot time in step 5, and be held low for the remainder of the duration field in step
7.
c. When the ED threshold is less than or equal to -70 dBm, the CCA should be held low for the
remainder of a slot time in step 5, and be held low for the remainder of the duration field in step
7.