12-06-2012, 02:41 PM
Enhanced FPGA Implementation of the Hummingbird Cryptographic Algorithm
Enhanced FPGA Implementation.pdf (Size: 841.27 KB / Downloads: 91)
Introduction
Low-cost smart devices like RFID tags and smart cards are rapidly becoming pervasive in our daily life. Well known applications include electronic passports, contactless payments, product tracking, access control and supply-chain management just to name a few. But the small programmable chips that passively respond to every reader have raised concerns among researchers about privacy and security breaches. A considerable body of research has been focused on providing RFID tags with cryptographic functionality, while scarce computational and storage capabilities of low-cost RFID tags make the problem challenging [1]. This emerging research area is usually referred to as lightweight cryptography which has to deal with the trade-off among security, cost, and performance [5].
The Hummingbird Encryption
In this section, we present the encryption process for the Hummingbird cryptographic algorithm. Note that the information given in this section can be found in [2,3,6], they are included here simply for the sake of completeness.
Hummingbird is neither a block cipher nor a stream cipher, but a rotor machine equipped with novel rotor-stepping rules [6]. It has a hybrid structure of block cipher and stream cipher with 16-bit block size, 256-bit key size, and 80-bit internal state.
Efficient FPGA Implementation
We use the coprocessor approach which takes advantage of the embedded memory
blocks in FPGA to implement Hummingbird cryptographic algorithm. This approach
reduces the area requirements in terms of slices since only the datapath and linear
feedback shift register (LFSR) module are realized in slices. With this approach,
efficiency (throughput/occupied slices) of the FPGA implementation of the
Hummingbird cryptographic algorithm is increased considerably with respect to the
previously reported FPGA implementations [6] of the algorithm, see Table 1.
FPGA Specifics
The Spartan-3 generation of FPGAs are specifically designed to meet the needs of
high volume, cost-sensitive electronic applications [13]. They have a dedicated carry
logic together with various arithmetic logic gates that support wide logic and
arithmetic functions.