25-01-2013, 02:56 PM
Future prospects of silicon photonics in next generation communication and computing systems
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The recent progress is reviewed and future prospects of silicon
photonics in next generation communication and computing systems
are probed. Leveraging the many-billion-dollar complementary
metal-oxide-semiconductor (CMOS) industry, silicon photonics has
promising prospects for realising very large-scale electronic and photonic
integrated circuits with thousands of optical components and
millions of transistors in the future to support very demanding integrated
systems needs of next generation computing and communications.
There are also a number of significant challenges in
fulfilling such prospects.
Introduction: The capability to cost-effectively integrate photonic
circuits and electronic circuits on a single and scalable platform can
bring fundamentally significant impacts to many applications including
computing, communications and signal processing. Such a capability
can combine the benefit of high-capacity and parallelism from photonics
together with versatility and intelligence from electronics. There has
been a long history of III–V optoelectronic integrated circuits
(OEICs) [1, 2] where optical detectors, modulators, multiplexers/
demultiplexers, or lasers are integrated with electrical amplifiers or
other electronics on the same platform. From the beginning, OEIC technology
development was considered to be a high-risk and high-reward
undertaking. Photonic integration alone (without electronics) can potentially
bring significant reduction in cost, power consumption, size and
even failures from (a) reduction in the number of discrete components,
(b) reduced packaging requirements (including thermoelectrical
coolers), and © fewer optical coupling interfaces. However, the
challenges have been the practical and sustainable yield, the material
and processing compatibility, and the signal and thermal crosstalk
isolation. The benefits of electronic–photonic integration can be
potentially even greater than those of photonic integration; however,
the challenges from the yield and material/fabrication compatibility
can be insurmountable.
Even today, there has not yet been a large-scale (.1000 components)
OEIC commercially deployed, but rather hybrid integration became
more popular, primarily owing to the high development cost, low
yield and poor flexibility associated with monolithically integrated fabrication
processes. In particular, epitaxial growth and regrowth based
integration on relatively small (50–100 mm diameter) InP or GaAs
wafers made it difficult to support very large-scale integration
(.10 000 components).
Silicon on the other hand is an excellent optical and electrical material
that comes in large wafer sizes backed by billions of dollars in CMOS
industry. Silicon exhibits very low optical losses (material losses ,
0.01 dB/cm losses in unintentionally doped Si material) at the standard
fibre optical communication wavelengths (1.3–1.6 mm). Pioneering
works by Soref and Petermann in the late 1980s and early 1990s
[3, 4] stimulated substantial activity in silicon photonics. Subsequent
introduction of commercial and practical high-volume manufacturing
of CMOS electronics on silicon-on-insulator (SOI) wafers significantly
accelerated research and development activity in silicon photonics [5].
When standard CMOS foundry processes can be used to fabricate electronic
and photonic integrated circuits (EPIC) together, very large-scale
EPICs can be envisioned for future integrated systems. Naturally, they
combine the versatility and intelligence of electronics and the benefit
of high-capacity and parallelism of photonics. This powerful combination
fundamentally impacts a wide range of applications, including
computing, communications and signal processing.