29-10-2013, 12:18 PM
FAT TREE ENCODER DESIGN FOR ULTRA-HIGH SPEED FLASH AD CONVERTERS.pdf (Size: 108.27 KB / Downloads: 146)
ABSTRACT
The thermometer code-to-binary code encoder has become
the bottleneck of the ultra-high speed flash ADCs. In this
paper, the authors presented the fat tree thermometer code-
to-binary code encoder that is highly suitable for the ultra-
high speed flash ADCs. The simulation and the implemen-
tation results show that the fat tree encoder outperforms the
commonly used ROM encoder in terms of speed and power
for the 6 bit CMOS flash ADC case. The speed is improved
by almost a factor of 2 when using the fat tree encoder,
which in fact demonstrates the fat tree encoder is an effec-
tive solution for the bottleneck problem in ultra-high speed
ADCs.
1. INTRODUCTION
A flash analog-to-digital converter (ADC) is known for its
high speed operation. An n bit ADC’s front-end consists
of N , 1 (where N = 2n ) voltage comparators, compar-
ing fully parallel the incoming analog signal with N , 1
reference voltages. The comparators produce the digital
thermometer-code (TC), and the remaining back-end of a
flash ADC consists of a thermometer code-to-binary code
encoder, as shown in Figure 1.
The most common implementation of the TC-to-BC (Bi-
nary Code) encoder has been the ROM/PLA circuits[1, 2,
3]; however, the TC-to-BC encoder becomes the bottleneck
of the ultra-high speed above 1 GHz sampling rate flash
ADCs. The alternate encoder designs such as Wallace tree
encoder[4] at 1 GHz sampling rate flash ADC implemented
with the GaAs technology, XOR encoder[5] at 8 GHz rate
ADC implemented with the SiGe bipolar technology, and
pipeline encoder[6] at 5 GHz rate ADC implemented with
the Josephson-junction super-conduction technology have
been used. More recently, flash ADCs implemented with
the CMOS technology perform the sampling rate in excess
of 1 GHz [7, 8, 9]. The authors noticed that indeed the TC-
to-BC encoder was the bottleneck of the ultra-high speed
CMOS flash ADC[8]. In this paper, the authors present
the fat tree TC-to-BC encoder that is highly suitable for the
ultra-high speed flash ADCs.
The main advantage of the fat tree encoder over the
other encoders is the high encoding speed. Also the fat tree
encoder consumes less power compared with the ROM en-
coder. However, the fat tree layout design is more difficult
and time consuming than the ROM layout design.