01-12-2012, 02:34 PM
FPGA Implementation of Multilevel Space Vector PWM Algorithms
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Abstract
Multilevel converters can meet the increasing
demand of power rating and power quality associated with
reduced harmonic distortion and lower electromagnetic
interface. With the increase in number of levels, it is necessary
to control more and more switches in parallel. Field
programmable gate arrays (FPGAs), with their concurrent
processing capability, are suitable for the implementation of
multilevel modulation algorithms. Among them, space vector
pulse width modulation algorithms offer great flexibility to
optimise switching waveforms. In this paper the SVPWM
technique is analysed and implemented in FPGA. The SVPWM
pulses thus generated through the FPGA tool is given as
switching pulses to the VSI circuit to trigger the three phase
induction motor. FPGA is chosen due to its fast prototyping,
simple hardware and software design. Simulation results are
provided along with the theoretical analysis in terms of THD,
output fundamental voltage and voltage transfer ratio to verify
the feasibility of operation.
INTRODUCTION
PWM inverters are becoming more and more popular in
today’s motor drives. Sinusoidal Pulse Width Modulation
(SPWM), is used to control the inverter output voltage and
maintains a good performance of the drive in the entire range
of operation between zero and 78 percentage of the value that
would be reached by square operation [1][2]. The Pulse
Width Modulation (PWM) Technique called “Vector
Modulation”, which is based on space vector theory, is the
most important development in the last few years[3][4][5].
Although, several of PWM methods have been created in the
past, the vector modulation technique appears to be the best
alternative for a three phase switching power converter
[6][7][8]. FPGA’s development reached a level of maturity
that made them the choice of implementation in many
fields[9].Recent applications of FPGA’s in industrial
electronics include mobile- robot path planning and
intelligent transporation [10][11],current control applied to
power converters [12][13],real-time hardware in the loop
testing for control design[14], controller implementation
[15][16], separating and recovering independent source
signals[17], and neural computation[18].
PRINCIPLE OF SPACE VECTOR PWM
The circuit model of a typical three-phase voltage source
PWM inverter is shown in Figure 1 S1 to S6 are the six
power switches that shape the output, which are controlled by
the switching variables a, a’, b, b’ and c, c’. When an upper
transistor is switched on, i.e., when a, b or c is 1, the
corresponding lower transistor is switched off, i.e., the
corresponding a′, b′ or c′ is 0. Therefore, the on and off states
of the upper transistors S1, S3 and S5 can be used to
determine the output voltage [26].
DRIVER CIRCUIT
Voltage level is amplified after receiving pulses from
optocoupler. Current level is amplified using coupled
transistor. To turn ON the transistors OR for biasing 12V the
transformer is used. It is converted into DC using a bridge
rectifier. The amplified pulse is taken as output from the
Emitter of the coupled transistor. The amplified output pulse
will be given to the Gate terminal of the MOSFET.
CONCLUSION
In this paper, a theoretical study concerning the SVPWM
control strategy on the voltage inverter based on FPGA is
presented. This aims on the one hand to prove the
effectiveness of the SVPWM in the contribution in the
switching power losses reduction. SVPWMis among the best
solution to achieve good voltage transfer and reduced
harmonic distortion in the output of an inverter.
Since Field programmable gate array (FPGA) have better
advantages compared to microprocessor and DSP control,
this modulation technique is implemented in an FPGA. The
FPGA coding makes it easier in designing the vector
modulation pattern generator using field programmable
Array.