25-08-2017, 09:32 PM
FlashFlex51 Microcontroller Using the Programmable Counter Array (PCA)
FlashFlex51 Microcontroller.pdf (Size: 162.44 KB / Downloads: 28)
INTRODUCTION
The Programmable Counter Array (PCA) present on the
SST89E/V554RC and SST89E/V564RD is a special 16-bit
timer that has five 16-bit capture/compare modules. Each
of the modules can be programmed to operate in one of
four modes: rising and/or falling edge capture, software
timer, high-speed output, or pulse width modulator. Module
4 can be programmed as a Watchdog Timer in addition to
the other four modes. Each module has a pin associated
with it in port 1. Module 0 is connected to P1.3 (CEX0),
module 1 to P1.4 (CEX1), module 2 to P1.5 (CEX2), module
3 to P1.6 (CEX3), and module 4 to P1.7 (CEX4).
PCA OVERVIEW
PCA provides more timing capabilities with less CPU intervention
than the standard timer/counter. Its advantages
include reduced software overhead and improved accuracy.
The PCA consists of a dedicated timer/counter which
serves as the time base for an array of five compare/capture
modules. Figure 3-1 shows a block diagram of the
PCA. External events associated with modules are shared
with corresponding Port 1 pins. Port pins not used by the
PCA modules can still be used for standard I/O. Each of the
five modules can be programmed in any of the following
modes:
• Rising and/or falling edge capture
• Software timer
• High speed output
• Watchdog Timer (Module 4 only)
• Pulse Width Modulator (PWM)
PCA TIMER/COUNTER
The PCA timer is a free-running 16-bit timer consisting of
registers CH and CL (the high and low bytes of the count
values). The PCA timer is common time base for all five
modules and can be programmed to run at 1/12 the oscillator
frequency, 1/4 the oscillator frequency, Timer 0 overflow,
or the input on the ECI pin (P1.2). The timer/counter source
is determined from the CPS1 and CPS0 bits in the CMOD
SFR as shown in Table 3-1. Table 3-2 summarizes
Modes 0-3 clock inputs at two common frequencies.
COMPARE/CAPTURE MODULES
Each PCA module has a mode SFR with it. These registers
are: CCAPM0 for module 0, CCAPM1 for module 1, etc.
Each register contains 7 bits that are used to control the
mode in which each module will operate. See Table 4-1.
The ECCF bit (CCAPMn0 where n = 0, 1, 2, 3, or 4
depending on module) will enable the CCF flag in the
CCON SFR to generate an interrupt when a match or compare
occurs. PWM (CCAPMn1) enables the pulse width
modulation mode. The MATn (CCAPMn3) bit when set, will
cause the CCFn bit in the CCON register to be set when
there is a match between the PCA counter and the module’s
capture/compare registers. Additionally, the TOG bit
(CCAPMn2) when set, causes the CEXn output pin associated
with that module to toggle when there is a match
between the PCA counter and the module’s capture/compare
registers.
PCA OPERATIONAL MODES
Capture Mode
Capture mode is used to capture the PCA timer/counter
value into a module’s capture registers (CCAPnH and
CCAPnL). The capture will occur on a positive edge, negative
edge, or both on the corresponding module’s pin. To
use one of the PCA modules in the capture mode, either
one or both the CCAPM bits CAPN and CAPP for that
module must be set. When a valid transition occurs on the
CEX pin corresponding to the module used, the PCA hardware
loads the 16-bit value of the PCA counter register (CH
and CL) into the module’s capture registers (CCAPnL and
CCAPnH). The CCFn bit for the module in the CCON SFR
is set by hardware. If the ECCFn bit in the CCAPMn SFR
are set, then an interrupt will be generated. In the interrupt
service routine, the 16-bit capture value must be saved in
RAM before the next event capture occurs. If a subsequent
capture occurred, the original capture values would be lost.
After the event flag (CCFn) has been set by hardware, the
user must clear the flag in software. (See Figure 5-1)
A common use for the PCA capture mode is to measure
the properties of a waveform. Properties such as the
period, pulse width or the phase difference of two waveforms
are measured by determining the difference in capture
values between two edges of the waveform. The
hardware support of the PCA capture mode allows accurate
measurement of these properties with low software
overhead. The following sample code shows how the PCA
capture mode can be used to measure the pulse width of a
waveform on the CEX0 pin.
16-bit Software Timer Mode
The 16-bit software timer mode is used to trigger interrupt
routines, which must occur at periodic intervals. It is setup
by setting both the ECOM and MAT bits in the module’s
CCAPMn register. The PCA timer will be compared to the
module’s capture registers (CCAPnL and CCAPnH) and
when a match occurs, an interrupt will occur, if the ECCFn
(CCAPMn SFR) bit for the module is set.
If necessary, a new 16-bit compare value can be loaded
into CCAPnH and CCAPnL during the interrupt routine.
The user should be aware that the hardware temporarily
disables the comparator function while these registers are
being updated so that an invalid match will not occur. Thus,
it is recommended that the user write to the low byte first
(CCAPnL) to disable the comparator, then write to the high
byte (CCAPnH) to re-enable it. If any updates to the registers
are done, the user may want to hold off any interrupts
from occurring by clearing the ECCFn bit or the EA bit.
(See Figure 5-2.)