08-01-2013, 04:43 PM
HIGH SPEED ADDER USED IN DIGITAL SIGNAL PROCESSING
HIGH SPEED ADDER USED IN DIGITA.ppt (Size: 231 KB / Downloads: 28)
INTRODUCTION
Among the various arithmetic operation addition is the simplest operation.
A combinational circuit that performs the addition of two bits known as half adder.
And that performs the addition of three bits known as full adder.
A full adder can be implemented from two half adders
HALF ADDER
Half adder circuit needs two binary inputs and two binary outputs
X and Y to the inputs and S and C to the outputs.
This simple adder has some draw back.
It is slow and it will not produce the correct result unless the signals are given enough time to propagate through the gates connected from the inputs to the outputs.
The solution for reducing the delay of the circuit is to employ faster gates with reduced delays.
RIPPLE CARRY ADDER
In a ripple-carry adder the result of an addition of two bits depends on the carry generated by the addition of the previous two bits. Thus, the Sum of the most significant bit is only available after the carry signal has rippled through the adder from the least significant stage to the most significant stage.
DELAY IN RIPPLE CARRY ADDER
In the ripple carry adder, the addition of (1+1 = 102) in the least significant stage causes a carry bit to be generated. This carry bit will consequently generate another carry bit in the next stage, and so on, until the final carryout bit appears at the output.
As a result, the final Sum and Carry bits will be valid after a considerable delay
CONCLUSION
Most of the adder structures discussed in this paper are applicable to general-purpose designs, with a few exceptions.
This paper has presented a comprehensive comparison of the six most commonly used adder structures.