20-06-2013, 04:28 PM
Hyper-Threading Technology
Hyper-Threading.ppt (Size: 300 KB / Downloads: 91)
Introduction
To Enhance Performance-
Increase in clock rate
Involves reducing clock cycle time
Can increase the performance by increasing number of instructions finishing per second
H/w limitations limit this feature
Cache hierarchies
Having frequently used data on the processor caches reduces average accesses time
Pipelining
Implementation Technique whereby multiple instructions are overlapped in execution
Limited by the dependencies between instructions
Effected by stalls and effective CPI is greater than 1
Instruction Level Parallelism
It refers to techniques to increase the number of instructions executed in each clock cycle.
Exists whenever the machine instructions that make up a program are insensitive to the order in which they are executed if dependencies does not exist, they may be executed.
Hyper-Threading Technology
Hyper-Threading Technology brings the simultaneous multi-threading approach to the Intel architecture.
Hyper-Threading Technology makes a single physical processor appear as two or more logical processors
Hyper-Threading Technology first invented by Intel Corp.
Hyper-Threading Technology provides thread-level-parallelism (TLP) on each processor resulting in increased utilization of processor and execution resources.
Each logical processor maintain one copy of the architecture state
SINGLE-TASK AND MULTI-TASK MODES
Two modes of operations
single-task (ST)
multi-task (MT).
MT-mode- There are two active logical processors and some of the resources are partitioned.
There are two flavors of ST-mode: single-task logical processor 0 (ST0) and single-task logical processor 1 (ST1).
In ST0- or ST1-mode, only one logical processor is active, and resources that were partitioned in MT-mode are re-combined to give the single active logical processor use of all of the resources
OPERATING SYSTEM
For best performance, the operating system should implement two optimizations.
The first is to use the HALT instruction if one logical processor is active and the other is not. HALT will allow the processor to transition MT mode to either the ST0- or ST1-mode.
The second optimization is in scheduling software threads to logical processors. The operating system should schedule threads to logical processors on different physical processors before scheduling two threads to the same physical processor.
Conclusion
Intel’s Hyper-Threading Technology brings the concept of simultaneous multi-threading to the Intel Architecture.
It will become increasingly important going forward as it adds a new technique for obtaining additional performance for lower transistor and power costs.
The goal was to implement the technology at minimum cost while ensuring forward progress on logical processors, even if the other is stalled, and to deliver full performance even when there is only one active logical processor.