13-04-2013, 04:31 PM
IC 555 TIMER - ASTABLE OPERATION CIRCUIT
AIM:
To generate unsymmetrical square and symmetrical square waveforms using IC555.
THEORY:
When the power supply VCC is connected, the external timing capacitor „C” charges
towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high (≈VCC) as Reset
R=0, Set S=1 and this combination makes Q =0 which has unclamped the timing capacitor
„C‟.
When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the control
flip flop on that Q =1. It makes Q1 ON and capacitor „C‟ starts discharging towards ground
through RB and transistor Q1 with a time constant RBC. Current also flows into Q1 through
RA. Resistors RA and RB must be large enough to limit this current and prevent damage to the
discharge transistor Q1. The minimum value of RA is approximately equal to VCC/0.2 where
0.2A is the maximum current through the ON transistor Q1.
During the discharge of the timing capacitor C, as it reaches VCC/3, the lower
comparator is triggered and at this stage S=1, R=0 which turns Q =0. Now Q =0 unclamps
the external timing capacitor C. The capacitor C is thus periodically charged and discharged
between 2/3 VCC and 1/3 VCC respectively. The length of time that the output remains HIGH
is the time for the capacitor to charge from 1/3 VCC to 2/3 VCC.
PROCEDURE:
I) Unsymmetrical Square wave
1. Connect the circuit as per the circuit diagram shown without connecting the diode OA 79.
2. Observe and note down the waveform at pin 6 and across timing capacitor.
3. Measure the frequency of oscillations and duty cycle and then compare with the given values.
4. Sketch both the waveforms to the same time scale.