28-02-2013, 10:01 AM
Digital Logic Design Sequential Circuits
Digital Logic Design.ppt (Size: 2.13 MB / Downloads: 92)
State Reduction
Two sequential circuits may exhibits the same input-output behavior, but have a different number of states
State Reduction:
The process of reducing the number of states, while keeping the input-output behavior unchanged.
It results in less Flip flops
It may increase the combinational logic!
Design of Synchronous Sequential Circuits
The design of a clocked sequential circuit starts from a set of specifications and ends with a logic diagram (Analysis reversed!)
Building blocks: flip-flops, combinational logic
Need to choose type and number of flip-flops
Need to design combinational logic together with flip-flops to produce the required behavior
The combinational part is
flip-flop input equations
output equations
Summary
To design a synchronous sequential circuit:
Obtain a state diagram
State reduction if necessary
Obtain State Table
State Assignment
Choose type of flip-flops
Use FF’s excitation table to complete the table
Derive state equations
Use K-Maps
Obtain the FF input equations and the output equations
Draw the circuit diagram