25-08-2017, 09:32 PM
A simple bus
¢ Wires:
“ Uni-directional or bi-directional
“ One line may represent multiple wires
¢ Bus
“ Set of wires with a single function
¢ Address bus, data bus
“ Or, entire collection of wires
¢ Address, data and control
¢ Associated protocol: rules for communication
¢ Conducting device on periphery
¢ Connects bus to processor or memory
¢ Often referred to as a pin
“ Actual pins on periphery of IC package that plug into socket on printed-circuit board
“ Sometimes metallic balls instead of pins
“ Today, metal pads connecting processors and memories within single IC
¢ Single wire or set of wires with single function
“ E.g., 12-wire address port
¢ Most common method for describing a communication protocol
¢ Time proceeds to the right on x-axis
¢ Control signal: low or high
“ May be active low (e.g., go™, /go, or go_L)
“ Use terms assert (active) and deassert
“ Asserting go™ means go=0
¢ Data signal: not valid or valid
¢ Protocol may have subprotocols
“ Called bus cycle, e.g., read and write
“ Each may be several clock cycles
¢ Read example
“ rd™/wr set low,address placed on addr for at least tsetup time before enable asserted, enable triggers memory to place data on data wires by time tread
¢ Suppose a peripheral intermittently receives data, which must be serviced by the processor
“ The processor can poll the peripheral regularly to see if data has arrived “ wasteful
“ The peripheral can interrupt the processor when it has data
¢ Requires an extra pin or pins: Int
“ If Int is 1, processor suspends current program, jumps to an Interrupt Service Routine, or ISR
“ Known as interrupt-driven I/O
“ Essentially, polling of the interrupt pin is built-into the hardware, so no extra time!