04-08-2012, 12:46 PM
Influence of the driver and active load threshold voltage in design of
pseudo-NMOS logic
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Abstract:
During the design phase of different logic gates based on MOS technologies, it is necessary to take into
consideration many parameters which characterise MOS transistors. One of the parameters which characterizes all
types of MOSFET transistors is the threshold voltage that has impact in static and dynamic performances of the
different logic gates. The aim of this paper is to research the impact threshold voltage of NMOS (driver) and
PMOS (active load) transistors during the design phase of pseudo-NMOS inverters and in pseudo-NMOS logic
gates which perform specific logic functions. The results obtained emphasize the impact of each single value of the
threshold voltage at the low level of the output voltage, at the level values of static current at output and on the
shape of the voltage transfer characteristic in the pseudo-NMOS inverter and pseudo-NMOS logic gates.
Introduction
An important value which characterizes all types of
MOSFET transistors is the value of threshold voltage
(Vth or Vt). According to the MOSFET type, the value
of threshold voltage can be positive and negative.
This value can be controlled during the fabrication
process of MOSFET transistors, Fig. 1 [2, 3, 4, 5, 8].
The value of the threshold voltage is controlled by
some physical parameters which characterize the
MOSFET (NMOS) structure such as: the gate
material, the thickness of oxide layer tox, substrate
doping concentrations (density) NA, oxide–interface
fixed charge concentrations (density) Nox, channel
length L, channel width W and the bias voltage VSB
[1, 9, 11, 12, 13].
Impact of threshold voltage in output
voltage of pseudo-NMOS gates
During the design phase of pseudo-NMOS logic
circuits, designers must take into consideration the
values of the threshold voltage of transistors which
contain that logic gate. Firstly, it will begin with the
VTC (voltage transfer characteristic) of pseudo-
NMOS invertors and show its shape for the some
different values of the driver threshold voltage where
the load threshold voltage has same values as in Fig.
12.
Conclusions
The value of threshold voltage is an electrical
parameter which can be controlled during the
MOSFET fabrication process. By selecting the values
of the threshold voltage we can design digital circuits
with the best performances in both static and
dynamic work regime. To reduce the number of
MOSFET transistors compared to CMOS
technologies in special application as supplements to
complementary CMOS design, it is possible to use
pseudo-NMOS technologies for logic design. But,
the disadvantages of pseudo-NMOS logic are: the
static dissipation power for low output state and low
output voltage level. Pseudo-NMOS logic is suitable
for the applications in which the output remains high
most of the time.