22-05-2012, 11:21 AM
Single Timer
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When the low signal input is applied to the reset terminal, the timer output remains low regardless of the threshold voltage or
the trigger voltage. Only when the high signal is applied to the reset terminal, timer's output changes according to threshold
voltage and trigger voltage.
When the threshold voltage exceeds 2/3 of the supply voltage while the timer output is high, the timer's internal discharge Tr.
turns on, lowering the threshold voltage to below 1/3 of the supply voltage. During this time, the timer output is maintained
low. Later, if a low signal is applied to the trigger voltage so that it becomes 1/3 of the supply voltage, the timer's internal
discharge Tr. turns off, increasing the threshold voltage and driving the timer output again at high.
Astable Operation
An astable timer operation is achieved by adding resistor RB to Figure 1 and configuring as shown on Figure 5. In astable
operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi
vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential
function with the time constant (RA+RB)*C.
When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high,
resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges
through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator
output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the
VC1 rises again.
Frequency divider
By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider. Figure
8. illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.
Pulse Width Modulation
The timer output waveform may be changed by modulating the control voltage applied to the timer's pin 5 and changing the
reference of the timer's internal comparators. Figure 9. illustrates the pulse width modulation circuit.
When the continuous trigger pulse train is applied in the monostable mode, the timer output width is modulated according to
the signal applied to the control terminal. Sine wave as well as other waveforms may be applied as a signal to the control
terminal. Figure 10 shows an example of pulse width modulation waveform.