08-01-2013, 10:33 AM
MOSFET Technology Scaling, Leakage Current, and Other Topics
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INTRODUCTION
MOS ICs have met the world’s growing needs for electronic devices for computing,
communication, entertainment, automotive, and other applications with steady
improvements in cost, speed, and power consumption. Such steady improvements in turn
stimulate and enable new applications and fuel the growth of IC sales. There is now an
entrenched expectation that this trend of rapid improvements will continue. How the
MOSFET might continue to meet this expectation is the subject of this chapter. One
overarching topic introduced in this chapter is the off-state current or the leakage current
of the MOSFETs. This topic compliments the discourse on the on-state current presented
in the previous chapter.
Technology Scaling—Small is Beautiful
Since the 1960’s the price of one bit of semiconductor memory has dropped 100 million
times and the trend continues. The cost of a logic gate has undergone a similarly
dramatic drop. This rapid price drop has stimulated new applications and semiconductor
devices have improved the ways people carry out just about all human activities. The
primary engine the powered the ascent of electronics is “miniaturization”. By making the
transistors and the interconnects smaller, more circuits can be fabricated on each silicon
wafer and therefore each circuit becomes cheaper. Miniaturization has also been
instrumental in the improvements in speed and power consumption.
Gordon Moore made an empirical observation in the 1960’s that the number of devices
on a chip doubles every 18 months or so. The “Moore’s Law” is a succinct description
of the persistent periodic increase in the level of miniaturization. Each time the minimum
line width is reduced, we say that a new technology generation or technology node is
introduced. Examples of technology generations are 0.18mm, 0.13mm, 90nm, 65nm,
45nm…generations. The numbers refer to the minimum metal line width. Poly-Si gate
length may be smaller. At each new node, the various feature sizes of circuit layout, such
as the size of contact holes, are 70% of the previous node. This practice of periodic size
reduction is called scaling. Historically, a new technology node is introduced every three
years or so.
Subthreshold Current--- “Off” is not totally “Off”
Circuit speed improves with increasing Ion, therefore it would be desirable to use a small
Vt. Can we set Vt at an arbitrarily small value, say 10mV? The answer is no.
At Vgs<Vt, an N-channel MOSFET is in the off-state. However, an undesirable leakage
current can flow between the drain and the source. The MOSFET current observed at
Vgs<Vt is called the subthreshold current. This is the main contributor to the MOSFET
off-state current, Ioff. Ioff is the Id measured at Vgs=0 and Vds=Vdd. It is important to keep
Ioff very small in order to minimize the static power that a circuit consumes even when it
is in the standby mode. For example, if Ioff is a modest 100nA per transistor, a cell-phone
chip containing one hundred million transistors would consume so much standby current
(10A) that the battery would be drained in minutes without receiving or transmitting any
calls. A desk-top PC chip may be able to tolerate this static power but not much more
before facing expensive problems with cooling the chip and the system.
Vt Roll-off --- Short-channel MOSFETs are Hard to Turn Off
The previous section pointed out that Vt must not be set too low, otherwise Ioff would be
too large. The present section extends that analysis to show that the channel length (L)
must not be too short. The reason is this: Vt drops with decreasing L as illustrated in Fig.
7-3. When Vt drops too much, Ioff becomes too large and that channel length is not
acceptable.
Reducing the Gate Insulator Thickness and Toxe
SiO2 has been the preferred gate insulator for silicon MOSFET since its very beginning in
the 1960’s and the oxide thickness has been reduced over the years from 300nm for
10mm technology to 1.2nm for 65nm technology. There are two reasons for the relentless
drive to reduce the oxide thickness. First, a thinner oxide, i.e. a larger Cox raises Ion. A
large Ion is desirable for maximizing the circuit speed (see Eq. 6.7.1). The second reason
is to control Vt roll-off (and therefore the subthreshold leakage) in the presence of falling
L according to Eqs. 7.3.3 and 7.3.4. One must not underestimate the importance of the
second reason. Fig. 7-6 shows that the oxide thickness has been scaled roughly in
proportion to the line width.
SiO2 –Breakdown Electric Field
What is the breakdown field of SiO2? There is no one simple answer because the
breakdown field is a function of the stress time. If a one second (1s) voltage pulse is
applied to a 10nm SiO2 film, 15V is needed to breakdown the film for a breakdown field
of 15MV/cm. The breakdown field is significantly lower if the same oxide is tested for
one hour. The field is lower still if it is tested for one month. This phenomenon is called
time-dependent dielectric breakdown. Many IC applications require a device lifetime
of 10 years. Clearly, manufacturers can not afford the time to actually measure the 10 yr
breakdown fields for new oxide technologies. Instead, researchers have predicted the 10
yr breakdown fields based on short-term tests in combination with theoretical models of
the physics of oxide breakdown. In retrospect, the most optimistic of the predictions,
7MV/cm for 10year operation, was basically right, and SiO2 thickness has been scaled
further than the other models predicted possible [8].