20-12-2012, 05:37 PM
Memory Structures: DRAM cells
Memory Structures.pdf (Size: 826.69 KB / Downloads: 78)
DRAM Cell Observations
1T DRAM requires a sense amplifier for each bit line, due
to charge redistribution read-out.
DRAM memory cells are single ended in contrast to
SRAM cells.
The read-out of the 1T DRAM cell is destructive; read
and refresh operations are necessary for correct
operation.
Unlike 3T cell, 1T cell requires presence of an extra
capacitance that must be explicitly included in the design.
When writing a “1” into a DRAM cell, a threshold voltage
is lost. This charge loss can be circumvented by
bootstrapping the word lines to a higher value than VDD
Introducing New Cells in CACTI
• CACTI is the most commonly used
memory structure characterization
programs.
• In this session, we will interact and modify
it to suit our needs.
Hand in (email) a PDF with:
1. Description of the cell implemented
2. Modifications made to CACTI
3. Evaluation of the configurations:
1. Effect of the associativity over power and delay
2. Effect of line-size over power and delay
3. Effect of size over power and delay
Hand in (email) the source CACTI code.
1. Be a nice programer and clearly mark your
modifications!