10-05-2014, 04:26 PM
Microprocessor Architecture and Programming
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[b]Micro Processor Architecture and Programming[/b]
A number of processors (two or more) are connected in a manner that allows them to share the simultaneous execution of a single task. In addition, a multiprocessor consisting of a number of single uni-processors is expected to be more cost effective than building a high-performance single processor.
A multiprocessor is expected to reach faster speed than the fastest uni-processor. Multiprocessor characteristics are Interconnection Structures, Interprocessor Arbitration, Interprocessor Communication and Synchronization, Cache Coherence. Multiprocessing sometimes refers to the execution of multiple concurrent software processes in a system as opposed to a single process at any one instant. The 2 architectural models of Multiprocessor are:
Tightly Coupled Multiprocessor are defined as Tasks and/or processors communicate in a highly synchronized fashion, Communicates through a common shared memory, Shared memory system
Loosely Coupled System is defined as Tasks or processors do not communicate in a synchronized fashion, Communicates by message passing packets, Overhead for data exchange is high, Distributed memory system.
[b]Functional Structures[/b]
Multiprocessors are characterized by 2 attributes:
First a multiprocessor is a single computer that includes multiple processors
Second processors may communicate and cooperate at different levels in solving a given problem.
The communication may occur by sending messages from one processor to the other by sharing a common memory.
2 Different Architectural Models of Multiprocessor are
Tightly Coupled System
- Tasks and/or processors communicate in a highly synchronized fashion
- Communicates through a common shared memory
- Shared memory system
Loosely Coupled System
- Tasks or processors do not communicate in a synchronized fashion
- Communicates by message passing packets
- Overhead for data exchange is high
- Distributed memory system
Loosely Coupled Multiprocessors
In loosely coupled Multiprocessors each processor has a set of input-output devices and a large local memory from where instructions and data are accessed.
Computer Module is a combination of
• Processor
• Local Memory
• I/O Interface
Processes which executes on different computer modules communicate by exchanging messages through a Message Transfer System (MTS).
The Degree of coupling is very loose. Hence it is often referred as distributed system.
Loosely coupled system is usually efficient when the interactions between tasks are minimal
Tightly Coupled Multiprocessors (TCS)
The throughput of the hierarchical loosely coupled multiprocessor may be too slow for some applications that require fast response times. If high speed or real time processing is required the
TCS may be used.
Two typical models are discussed:
In the first model, it consists of
• p processors
• l memory modules
• d input-output channels
The above units are connected through a set of three interconnection networks namely the
• processor-memory interconnection network (PMIN)
• I/O processor interconnection network (IOPIN)
• Interrupt Signal Interconnection Network (ISIN)
The PMIN is a switch which can connect every processor to every module. It has pl set of cross points. It is a multistage network. A memory can satisfy only one processor’s request in a given memory cycle. Hence if more than one processors attempt to access the same memory module, a conflict occurs and it is resolved by the PMIN.
Processor Characteristics for Multiprocessing
A number of desirable architectural features are described below for a processor to be effective in multiprocessing environment.
[b]Processor recoverability[/b]
The process and processor are 2 different entities. If the processor fails there should be another processor to take up the routine. Reliability of the processor should be present.
Efficient Context Switching
A general purpose register is a large register file that can be used for multi-programmed processor. For effective utilization it is necessary for the processor to support more than one addressing domain and hence to provide a domain change or context switching operation
Large Virtual and Physical address space
A processor intended to be used in the construction of a general purpose medium to large scale multiprocessor must support a large physical address space. In addition a large virtual space is also needed.
[b]Effective Synchronization Primitives[/b]
The processor design must provide some implementation of invisible actions which serve as the basis for synchronization primitives.
Interprocessor Communication mechanism
The set of processor used in multiprocessor must have an efficient means of interprocessor mechanism.
Instruction Set
The instruction set of the processor should have adequate facilities for implementing high level languages that permit effective concurrency at the procedural level and for efficiently manipulating data structures.
Multistage Networks for Multiprocessors
In order to design multistage networks, the basic principles involved in the construction and control of simple crossbar has to be understood.
This 2 x 2 switch has the capability of connecting the input A to either the output labeled 0 or to the output labeled 1, depending on the value of some control bit CA of the input A. If CA = 0 the input is connected to the upper output, and if CA = 1, the connection is made to the lower output. Terminal B of the switches behaves similarly with a control bit CB. The 2 x 2 module also has the capability to arbitrate between conflicting requests. If both inputs A and B require the same output terminal, then only one of them will be connected and the other will be blocked or rejected.