12-10-2012, 04:24 PM
Minimisation of total harmonic distortion in a cascaded multilevel inverter by regulating voltages of DC sources
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Abstract:
Recently, a switching strategy based on minimisation of total harmonic distortion (MTHD) has been proposed.
Normally, in multilevel flexible AC transmission systems, DC voltages of capacitors are changed. It is proposed to regulate
this value on a predefined value. Thus, desired value is employed for optimising THD value. Results show effectiveness of
the proposed method in minimising THD, when it is compared with the case of a multilevel inverter with constant DC
sources. Genetic algorithm as a powerful tool is used to minimise THD as well as satisfy fundamental component. To verify
theory and simulation results, a seven-level cascaded inverter-based hardware prototype is built.
Introduction
Integrating multilevel inverters into industrial applications,
such as motor drives [1, 2], static VAR compensators [3],
DC-to-DC converters [4] and renewable energy systems
[5, 6], is the subject of many ongoing studies. Compared to
the traditional three-level voltage source inverters, the
stepwise output voltage is the major advantage of multilevel
inverters. This advantage results in higher-power quality,
better electromagnetic compatibility, lower switching losses,
higher-voltage capability and may lead to elimination of the
coupling transformer, thereby reduction in the costs [1–6].
Multilevel inverters are generally divided into three major
configurations: diode-clamped multilevel inverters [7],
flying-capacitor multilevel inverters and cascaded H-bridge
multilevel inverters (CHML). The CHML [8] has
advantages to the other multilevel structures in terms of its
structure that is not only simple and modular but also
requires the least number of components. This modular
structure makes it easily extensible for higher number of
output voltage levels without increase in power circuit
complexity. In addition, extra clamping diodes or voltage
balancing capacitors are not necessary [9]
Experimental results
In order to validate the computational results as well as
simulations, experimental results are presented. Fig. 9
shows an experimental prototype of a three-phase sevenlevel
Y-connected cascaded inverter. The maximum rating
of this inverter is 2 kVA. Owing to low switching
frequency, the ATMEGA32 AVRw microcontroller is
chosen to control the switching signals. In fact, this
microcontroller has several advantages including low cost,
simplicity and high-speed computations. With 16 MIPS
operation of this chip, the difference between calculated and
implemented angles which is caused by delays in the digital
system is less than 1 ms.
Conclusion
MTHD switching strategy is applied to the cascaded
multilevel inverter to reduce the THD. In this paper, it is
proposed to consider the alterable DC sources instead of
constant DC sources, if it is possible. Performing this
assumption shows that the value of THD in both cases of
phase and line voltages is effectively reduced. Experimental
results verify both the theoretical and simulation results.
Note that implementing this assumption in the devices such
as STATCOM needs no additional cost or complexity.