28-06-2013, 04:53 PM
New Efficient Bridgeless Cuk Rectifiers for PFC Applications
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Abstract
Three new bridgeless single-phase ac–dc power factor
correction (PFC) rectifiers based on Cuk topology are proposed.
The absence of an input diode bridge and the presence of only
two semiconductor switches in the current flowing path during
each interval of the switching cycle result in less conduction losses
and an improved thermal management compared to the conventional
Cuk PFC rectifier. The proposed topologies are designed
to work in discontinuous conduction mode (DCM) to achieve almost
a unity power factor and low total harmonic distortion of the
input current. The DCM operation gives additional advantages
such as zero-current turn-ON in the power switches, zero-current
turn-OFF in the output diode, and simple control circuitry. Performance
comparisons between the proposed and conventional Cuk
PFC rectifiers are performed based on circuit simulations. Experimental
results for a 150 W/48 Vdc at 100 Vrms line voltage to evaluate
the performance of the proposed bridgeless PFC rectifiers are
provided.
INTRODUCTION
POWER supplies with active power factor correction (PFC)
techniques are becoming necessary for many types of electronic
equipment to meet harmonic regulations and standards,
such as the IEC 61000-3-2. Most of the PFC rectifiers utilize
a boost converter at their front end. However, a conventional
PFC scheme has lower efficiency due to significant losses in
the diode bridge. A conventional PFC Cuk rectifier is shown in
Fig. 1; the current flows through two rectifier bridge diodes and
the power switch (Q) during the switch ON-time, and through
two rectifier bridge diodes and the output diode (Do ) during
the switch OFF-time. Thus, during each switching cycle, the
current flows through three power semiconductor devices. As a
result, a significant conduction loss, caused by the forward voltage
drop across the bridge diode, would degrade the converter’s
efficiency, especially at a low line input voltage.
Capacitor Selection
The energy transfer capacitors C1 and C2 are important elements
in the proposed Cuk topologies since their values greatly
influence the quality of input line current. Capacitors C1 and C2
must be chosen such that their steady-state voltages follow the
shape of the rectified input ac line voltagewaveform plus the output
voltage with minimum switching voltage ripple as possible.
Also, the values of C1 and C2 should not cause low-frequency
oscillations with the converter inductors. In a practical design,
the energy transfer capacitors C1 and C2 are determined based
on inductors L1 , Lo values (assuming L1 = L2 and Lo 1 = Lo 2 =
Lo ) such that the resonant frequency (fr ) during DCM stage is
higher than the line frequency (fl ) and well below the switching
frequency (fs ).
COMPARISON STUDY BETWEEN THE PROPOSED AND
CONVENTIONAL CUK CONVERTERS
The proposed topologies are compared with respect to their
components count, efficiency, driver circuitry complexity, THD,
and voltage gain range.
To ensure a fair comparison, the inductance values in all
topologies are selected such that Ke = 0.9 Kcrit at an operating
point of an output power of 300W. Moreover, an equivalent
series resistor (ESR) of 20mΩ and 12 mΩ is placed in series
with all the inductors and capacitors, respectively. Furthermore,
PSPICE actual semiconductor models have been used to simulate
the switches. Table I shows the details of the components
used in the simulation. The converters were simulated for an
output voltage of 48V under a minimum nominal input voltage
of 120 Vrms condition.
SIMULATION AND EXPERIMENTAL RESULTS
The type-3 converter of Fig. 2© has been simulated using
PSPICE for the following input and output data specifications:
vac = 100 Vrms , Vo = 48V, Pout = 150W, and fs = 50 kHz.
The circuit components used in the simulation are the same as
those in Table I. Fig. 10 shows the simulated voltage and current
waveforms at full-load condition. It can be observed from
Fig. 10(a) that the input line current is in phase with the input
voltage. Fig. 10(b) shows the current through the slow diodes
Dp and Dn . Fig. 10© shows the inductors’ currents waveforms
over one line period. Fig. 10(d) shows the simulated output
inductor currents over one line period, whereas the switching
waveforms of the inductors’ currents at peak input voltage are
illustrated in Fig. 10(e), which correctly demonstrate the DCM
operating mode. The active switches’ currents and the intermediate
capacitors’ voltages waveforms are depicted in Fig. 10(f)
and (g), respectively.
CONCLUSION
Three single-phase ac–dc bridgeless rectifiers based on Cuk
topology are presented and discussed in this paper. The validity
and performance of the proposed topologies are verified by
simulation and experimental results. Due to the lower conduction
and switching losses, the proposed topologies can further
improve the conversion efficiency when compared with the conventional
Cuk PFC rectifier. Namely, to maintain the same efficiency,
the proposed circuits can operate with a higher switching
frequency. Thus, additional reduction in the size of the PFC inductor
and EMI filter could be achieved. The proposed bridgeless
topologies can improve the efficiency by approximately
1.4% compared to the conventional PFC Cuk rectifier. The performance
of two types of the proposed topologies was verified
on a 150Wexperimental prototype. The measured efficiency of
the prototype rectifier at 100 Vrms line and full load is above
93% with THD below 2%. Experimental results are observed to
be in good agreement with simulation results.