30-07-2012, 04:49 PM
On the systematic synthesis of CCII-based floating simulators
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INTRODUCTION
The floating simulators have always been basic elements in analog signal-processing circuits that
are used to overcome the limitations of actual on-chip passive elements (e.g. floating coils and highvalued
floating capacitances or resistances). The second generation current conveyor (CCII) [1] is
one of the most popular active building-blocks used to realize floating simulator circuits throughout
the literature. Several authors have investigated and proposed various simulator circuits for floating
coils, FDNRs, and capacitance multipliers using CCIIs. However, in the process of designing active
circuits, it is desirable to follow systematic methodologies to obtain novel circuits [2, 3]. This is
beneficial in developing analog tools for circuit design automation. In [3], some current-mode
floating inductance simulators using current conveyors and transconductance amplifiers have been
derived by a systematic approach.
Floating Y2 (or Y1) and grounded Y1 (or Y2)
In this class of floating simulators, the same expansion steps used to move the ±Y2 terms in the
previous class can be used, because Y2 is floating in both classes. The difference between the two
classes is that Y1 was floating in the previous class while it will be grounded in this one.
NONIDEAL EFFECTS
Up to this point, the paper has been concerned with synthesis of CCII-based floating simulators
taking into consideration only the parasitic components experienced at device terminals. However,
there are other nonidealities associated with typical CCII devices represented in voltage and
current tracking errors between the Y and X terminals and the X and Z terminals, respectively.
In essence, these tracking errors show up as nonunity voltage and current gains between the
Y and X terminals and X and Z terminals, respectively. According to the basic definition of
infinity-variables [5], these nonunity gains can be represented in the NAM by including the
nonideal tracking gains as coefficients for infinity-variables occupying the column corresponding
to the Y -terminal (in case of voltage gain error) and the rows occupying the row corresponding
to the X-terminal (in case of current gain error). As a simple example, consider the circuit
represented by the NAM in (26).
CONCLUSION
In this paper, the systematic synthesis of CCII-based wide-band floating simulators, using the
generalized framework for linear active circuits has been studied. The resulting synthesized floating
simulators include circuits that have been reported earlier in the literature in addition to novel
floating simulators, using various types of CCII. According to the passive elements used in the
realizations, these circuits can be used to simulate floating coils, FDNRs, capacitance multipliers.
. . etc. The merits and drawbacks of the synthesized circuits vary according to the design
tradeoffs, including the number of active devices, number and values of floating and grounded
passive elements, matching requirements, and tunability. Many other floating inductance circuits
[20] that are available in the literature can also be realized using the proposed generation method
and are not included to limit the paper length. SPICE simulations have been presented to verify the
performance of the new circuits obtained using the systematic synthesis framework, when used to
simulate floating inductances. Simulation results indicate that high-performance novel wide-band
CCII-based simulated floating coils have been synthesized systematically using the generalized
framework. Thus, the potentials of the generalized systematic synthesis framework in synthesizing
high-performance novel circuits have been demonstrated through this study.