02-04-2012, 11:41 AM
PC Architecture: An Overview
PC Architecture An Overview.pdf (Size: 1.18 MB / Downloads: 58)
History of PC
Altair shipped the first “PC” in 1975
• I/O through front panel switch and LEDs
• Primarily for hobbyists and hackers
Apple – II was the first real PC
• I/O though keyboard and color graphics
• Targeted at home and business market
Other vendors included Tandy, Commodore & TI
• Each vendor had his own architecture, bus, OS.
• By purchase, implicit commitment was made to
that vendor’s standard
Success of PC architecture
PC architecture dates back to 1978
• IBM launched PC in August 1981
“Personal” computing was introduced first time
• Earlier ones were Mainframes and Minis
“Open design” proved to be a prime factor for success
• Design documentation
– Hardware Schematics
– Specifications of I/O bus
– BIOS listing, and BIOS calls standardization
Adopted by multiple vendors
Compare the above with Apple Macintosh systems
Specifications of IBM PC
CPU – 8088 @ 4.77 Mhz
Optional Co-processor 8087
Main Memory 16 to 64kb,
expandable to 640kb
Two 5 ¼” (160Kb) FDD
Display adapter CGA – 320X200X4
84 key keyboard
14” display
MS-DOS 1.0
PC architecture
• Standard interface in hardware
– Architecture of system (PC) is different from
architecture of microprocessor (8088)
– Firmware provides abstraction layer for the
system software (OS)
• Software: adaptation of a standard API, used by
future hardware
– e.g. windows API framework
• What about peripherals ?
– standardization follows popularity (e.g. 1.4” disk
drives)
PC architecture
Basic model
• Input --> processed by CPU --> results returned to
external world
• Input: from keyboard/ floppy
• CPU and related blocks
• Output: to screen/ floppy
Some variations:
• Input/ Output can be over the network
• There may be a need to simplify user interactions
(e.g mouse)
• Input can be from scanners
• Output can go to printer/ plotter
Main components of a PC
CPU
Memory subsystem
I/O subsystem
A controller which binds these blocks together.
Block diagram
CPU
LL2 2C Cacahchee
System
Controller
And
Host Bridge
Main
Memory
Main
Memory
PCI-ISA bridge
K/B
FDD/HDD
Serial/Parallel
PCI SCSI
PCI Graphics PPCCI IS Sloltosts
ISISAA S Sloltosts
PCI Bus
ISA Bus
EPROM
RTC
The block diagram
Major components:
CPU, cache, main memory
System controller
I/O subsystem: on board devices + bus slots
Boot EPROM/FLASH, RTC, serial/parallel, keyboard
FDD/HDD controllers
Power supply
Three directions
Cost
Integration
Performance
Contributing factors
Advances in VLSI: (Moore’s law)
• CPU and system controllers, other logic chips
Memory
• More memory at the same price
Peripherals and I/O bus
• More bandwidth at less cost
Advances in VLSI
Process enhancements
• Era of submicron feature size
(0.13 u Pentium 4)
• Interconnects
How does it help?
• Reduced die size improves frequency of
operation, improves %yield
• Requires reduced core voltage, results in lower
power dissipation
Earlier Generation
8086/ 8088 (CPU) + 8087 (FPU) + 8089 (IOP)
80286 + 80287
80386 + 80387
80486
• 486SX, 486DX, 486DX2,486DX4
New generation...
Pentium: various speeds, with/ without MMX
Pentium Pro
Pentium-II
Pentium-III
Pentium-4
Itanium and McKinley
CPU
What decides the CPU performance ?
• ALU width (data size processed every clock)
• clock speed (MHz)
• Efficiency of the core (Number of instructions
executed per second)
• System interface (how well CPU interacts with the
rest of the system)
Simple example of 64-bit integer add
mov [addr1], R1
mov [addr2], R2
add R1, R2, R2
mov R2, [addr3]
Intel: x86 architecture
20 years old! Origins in 8080 chip
segmented memory approach to retain 8080
compatibility
CISC architecture characterized by:
• large no. of instructions
• variable length instructions
• large no. of addressing modes
8086/88 :
8086 in1976, 8088 in 1978: 29,000 transistors
16 bit CPU
Memory addressability: 1 MB (20 addr lines),
Data lines: 8/16
ALU registers, segment registers, stack pointer
registers, program counter
• AX, BX, CX, DX
• CS, DS, SS, ES
• SP, BP, PC
Frequency 4.77 MHz
Typical system based on 8088
8088 CPU
clock generator/ controller
DMA controller
interrupt controller
UART for communication
Keyboard controller
8-bit wide memory
LSI/MSI blocks: Decoders, transceivers, multiplexers
80286: multi-user configuration
1982, 134,000 transistors
16 bit CPU, faster core
24 bit address (16 MB), 16 bit data
8MHz .. 16 MHz clock speed
real mode, protected mode
• real mode: fast 8086
• protected mode: multitasking, memory protection,
virtual memory
80386: 32-bit computing
1985, 275,000 transistors
32-bit CPU
• extended registers (eax, ebx,..)
32-bit addr bus, 32-bit data bus
up to 33 MHz
MMU: paging capability
switch to/from protected mode
Virtual x86 mode
80486: Functional Integration
1989, 1.2 Million transistors
Vastly improved core, many of the instructions
executed in one clock cycle
On-chip FPU + 8 KB/ 8 KB instruction/ data cache
Simplified and efficient bus interface
• burst read/write (single address, multiple data)
• Write buffer, write merge
• support for external cache