15-10-2012, 01:32 PM
Resistance and Capacitance Meter Using a PIC16C622
Resistance and Capacitance.pdf (Size: 436.85 KB / Downloads: 32)
INTRODUCTION
The PIC16C62X devices create a new branch in
Microchip’s PIC16CXXX 8-bit microcontroller family by
incorporating two analog comparators and a variable
voltage reference on-chip. The comparators feature
programmable input multiplexing from device inputs
and an internal voltage reference. The internal voltage
reference has two ranges, each capable of 16 distinct
voltage levels. Typical applications such as appliance
controllers or low-power remote sensors can now be
implemented using fewer external components thus
reducing cost and power consumption. The 18-pin
SOIC or 20-pin SSOP packages are ideal for designs
having size constraints.
COMPARATOR MODULE
The comparator module contains two analog
comparators with eight modes of operation. The inputs
to the comparators are multiplexed with the RA0
through RA3 pins. The on-chip voltage reference can
also be selected as an input to the comparators. The
Comparator Control Register (CMCON) controls the
operation of the comparator and contains the comparator
output bits. Figure 1 shows the CMCON register.
Comparator Operating Modes
The analog inputs to the comparator module must be
between VSS and VDD and one input must be in the
Common Mode Range (CMR). The CMR is defined as
VDD-1.5 volt to VSS. The output of a comparator will
default to a high level if both inputs are outside of the
CMR. If the input voltage deviates above VDD or below
VSS by more than 0.6 volt, the microcontroller may
draw excessive current.
Clearing the Comparator Interrupt Flag
The comparator interrupt flag, CMIF, is located in the
PIR1 register. This flag must be cleared after changing
comparator modes. Whenever the comparator mode or
the CIS bit is changed, the CMIF may be set due to the
internal circuitry switching between modes. Therefore,
comparator interrupts should be disabled before
changing modes. Then, a delay of 10 ms should be
used after changing modes to allow the comparator
circuitry to stabilize.
The steps to clear the CMIF flag when changing modes
are as follows:
• Change the comparator mode or CIS bit
• 10 ms delay
• Read the CMCON register to end the “mismatch”
condition
• Clear the CMIF bit of the PIR1 register
The value of C1OUT and C2OUT are internally latched
on every read of the CMCON register. The current
values of C1OUT and C2OUT are compared with the
latched values, and when these values are different a
“mismatch” condition occurs. The CMIF interrupt flag
will not be cleared if the CMCON register has not been
read.
VOLTAGE REFERENCE MODULE
The voltage reference is a 16-tap resistor ladder
network that is segmented to provide two ranges of
VREF values. Each range has 16 distinct voltage levels.
The voltage reference has a power-down function to
conserve power when the reference is not being used.
The voltage reference also has the capability to be
connected to RA2 as an output. Figure 11 shows the
Voltage Reference Control Register (VRCON) register
which controls the voltage reference. Figure 12 shows
the block diagram for the voltage reference module.
Using the Voltage Reference
The voltage reference module operates independently
of the comparator module. The output of the voltage
reference may be connected to the RA2 pin at any time
by setting the TRISA<2> bit and the VRCON<6> bit
(VROE). It should be noted that enabling the voltage
reference with an input signal present will increase current
consumption. Configuring the RA2 pin as a digital
output with the VREF output enabled will also increase
current consumption. The increases in current are
caused by the voltage reference output conflicting with
an input signal or the digital output. The amount of
increased current consumption is dependent on the
setting of VREF and the value of the input signal or the
digital output.
Voltage Reference Settling Time
Settling time of the voltage reference is defined as the
time it takes the output voltage to settle within 1/4 LSb
after making a change to the reference. The changes
include adjusting the tap position on the resistor ladder,
enabling the output, and enabling the reference itself. If
the voltage reference is used with the comparator module,
the settling time must be considered.
MAKING SIMPLE A/D CONVERSIONS
Linear slope integrating A/D converters are very simple
to implement and can achieve high linearity and
resolution for low conversion rates. The three types of
converters that will be discussed are the single-slope,
dual-slope, and modified single-slope converters. The
following material was referenced from application note
AN260, “A 20-Bit (1ppm) Linear Slope-Integrating A/D
Converter”, found in the Linear Applications Handbook
from National SemiconductorÒ.
Single-Slope Integrating Converter
A single-slope integrating converter is shown in
Figure 13. In a single-slope converter, a linear ramp is
compared against an unknown input VAIN. When the
switch S1 is opened the ramp begins. The time interval
between the opening of the switch and the comparator
changing state is proportional to the value of VAIN.
The basic assumptions are that the integrating
capacitor C1 and the clock used to measure the time
interval remain constant over time and temperature.
This type of converter is heavily dependent on the
stability of the integrating capacitor.