20-10-2012, 05:24 PM
Pass Transistor Circuits
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We can view the complementary CMOS gate as switching the
output pin to one of power or ground.
A slightly more general gate is obtained if we switch the
output to one of power; ground; or any of the input signals.
In such designs the MOSFET is considered to be a pass
transistor.
When used as a pass transistor the device may conduct
current in either direction.
Cascaded Pass Transistors - 2
1 With an n-channel transistor high voltages are degraded by
one Vt .
2 Similar circuits with a p-channel device “degrade” (by
increasing) a logic zero by one Vt .
3 So such circuits are normally confined to the internal circuitry
of a gate.
4 Full logic levels can be regenerated with an inverter at the
output of the gate.
Transmission Gate Implementation - 2
1 Note the need for the term 0.S1S2. If not present then when
S1 = S2 = 1 the output f would float.
2 Each transmission gate may now be replaced with two
transistors.
3 Where lines connect only to logic 1 the nMOS devices may be
omitted.
4 Where lines connect only to logic 0 the pMOS devices may be
omitted.
5 nMOS and pMOS devices may be grouped to minimise the
number of wells required.
Viable Approaches
Viable design approaches are:
Choose a number of inputs as mux select inputs and proceed
as above.
Plot variables on K-maps.
Tabular methods such as modifications of Quine-McCluskey -
not covered here