10-07-2012, 04:38 PM
Common-Collector Amplifier Design
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Introduction
This note describes the process for designing a common-collector amplifier. Commoncollector
amplifiers have two applications. The first is at the input of an amplifier chain
to raise the input impedance. The second is at the output of an amplifier chain to lower
the output resistance. In the design of a common-collector amplifier there is a tradeoff
between power gain and output signal swing. A common-collector amplifier at the input
of an amplifier chain would likely be designed to maximize the power gain since the
output signal is going to be too small for signal swing to be an issue. A commoncollector
amplifier at the output of an amplifier chain driving the load resistance would
likely be designed for maximum signal swing at the forfeit of power gain. The choice of
emitter resistor, RE, and the bias point, VEQ, vary depending on whether power gain or
signal swing is important. Both will be discussed in detail.
Choice of emitter resistor, RE
The design of a common-collector amplifier begins with the choice of RE based on
knowing the load resistance, RL. Rather than discuss specific ohmic values for RE and
RL, it is simpler to discuss the generic ratio, (RE/RL), since that is the only real variable.
The power gain of the amplifier is made large by making this ratio large. The linear
output signal swing is made large by making this ratio small. Thus, a tradeoff has to be
made. There are two competing mathematics here –one for power gain and the other for
linear output signal swing. Both of these mathematics will be developed below.
Mathematics for power gain
For practical reasons this discussion will assume that the dynamic emitter resistance, re,
is small in comparison to the parallel combination of RE and RL, RE|RL, and can thus be
ignored. This is a good approximation for any well designed common-collector amplifier
and lets us ignore what generally ends up being small variations in the calculations based
on bias voltage and currents. The error in doing this is in the direction of making the
computed power gain a bit larger than it will actually be. The goal here is to understand
how to make the power gain high rather than to calculate the exact value.
The input resistance of the amplifier is the base bias resistance, RB, in parallel with
(B+1)*(RE|RL) remembering that we are ignoring the small effect of re and noting that B
is the beta of the transistor. In the design for bias stability with beta we know that the
ratio, (RB/RE) will be a certain maximum value, (RB/RE)max, based on the collector
current stability requirements and the spread of beta for the transistor.