08-05-2012, 11:04 AM
RISC vs. CISC
Risc_vs_Cisc.ppt (Size: 98 KB / Downloads: 67)
Topics of Discussion:
Technological limitations which lead up to the design philosophies of RISC and CISC
RISC and CISC Processor Methodologies
Processing Comparisons
Today’s Processors – Combining RISC and CISC for better performance
CISC Methodology
Complex instructions written in a high level language translate directly into exactly one instruction in assembler.
Reduced difficulty in writing compilers, improve code compaction, and ease debugging.
Improve the efficiency of programs written in high level languages.
Reduce software development costs as well as the size and complexity of programs/systems.
Complex Instructions:
CISC ‘rolls up’ this instruction set into one compact instruction to be handled by the decoder.
MULT [2:3, 5:2]
Microcode engine within the CPU decodes the complex instructions and executes microcode programs to carry out the task
Advantages of RISC:
RISC uses only register to register operations
Only LOAD and STORE operations have access to memory
Separation of LOAD and STORE instructions allows the compiler to shift these operations around for maximum efficiency during execution.
Simple instructions require fewer transistors which make the chips easier to design and cheaper to produce