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ABSTRACT
The traditional grid-connected PV inverter includes either a line frequency or a high frequency transformer between the inverter and grid. The transformer provides galvanic isolation between the grid and the PV panels. In order to increase the efficiency, to reduce the size and cost, the effective solution is to remove the isolation transformer. It leads to appearance of common mode (CM) ground leakage current due to parasitic capacitance between the PV panels and the ground. The common mode current reduces the efficiency of power conversion stage, affects the quality of grid current, deteriorate the electric magnetic compatibility and give rise to the safety threats. In order to eliminate the common mode leakage current in transformer less PV system, the concept of virtual DC bus is proposed in this project. By connecting the grid neutral line directly to the negative pole of the DC bus, the stray capacitance between the PV panels and the ground is bypassed. The CM ground leakage current can be suppressed completely. Virtual DC bus is created to provide the negative voltage level for the negative AC grid current generation. The virtual DC bus is realized with the switched capacitor technology that uses less number of elements. Therefore, the power electronic cost can be reduced. This topology can be modulated with the unipolar SPWM to reduce the output current ripple. A smaller filter inductor can be used to reduce the size and magnetic losses. The simulation result of the proposed topology using MATLAB/SIMULINK is presented.
1. Introduction
The Interest in supply circuits that harvest energy from the surrounding environment for powering embedded systems has been increasing over the last years [1]–[4]. Thanks to the progress in low-power design, research has greatly reduced the size and the power consumption of distributed embedded systems, and the autonomy of these systems can be further increased by energy-harvesting techniques. Nowadays, small solar panels suffice to ensure continued operation, and several photovoltaic (PV) harvesting circuits have been recently proposed for this purpose [5], [6].
The output characteristics of a PV array vary nonlinearly when temperature or irradiance conditions change. Therefore, maximum-power-point tracking (MPPT) techniques are exploited for adjusting the operating point of the solar panel in order to obtain the maximum output power from the PV module. So far, MPPT methods have been roughly classified into two groups: large-scale PV power systems, generally making use of digital signal processors (DSPs) or microcontrollers [7]–[9], and small-scale PV power systems, usually without digital controllers. They are less accurate, but they are cheaper with an advantageous cost efficiency in PV applications below 50 W [10], [11].
EXISTING DEMERITS
i) In the traditional grid-connected PV inverters, either a line frequency or a high-frequency transformer is utilized to provide a galvanic isolation between the grid and the PV panels.
ii) In half bridge inverter the voltage across the parasitic capacitor is clamped to be constant by the dc bus capacitor. However, this method has an important disadvantage that the required dc bus voltage should be doubled compared with the full-bridge topologies.
iii) The Karschny inverter and the paralleled buck inverter are derived from the buck–boost and buck circuits, respectively. These solutions have high reliability, but are not capable of supplying the reactive power to the grid. The inverter proposed in employs a capacitor voltage divider to keep the CM voltage constant, but is regarded to be of higher conduction losses.
iv) By inserting extra switches into the full bridge inverter either on the dc or ac side, the dc bus can be disconnected from the grid when the inverter output voltage is at zero voltage level, so that the CM current path is cut off.
PROPOSED MERITS
i) By connecting the grid neutral line directly to the negative pole of the dc bus, the stray capacitance between the PV panels and the ground is bypassed. As a result, the CM ground leakage current can be suppressed completely.
ii) The virtual dc bus is created to provide the negative voltage level for the negative ac grid current generation. Consequently, the required dc bus voltage is still the same as that of the full-bridge inverter.
iii) Removing the isolation transformer can be an effective solution to increase the efficiency and reduce the size and cost.
iv) Current stress is reduced.
v) Switching losses get reduced.
BRIEF EXPLANATION
Single-phase, single-stage current source inverter-based photovoltaic system for grid connection is proposed. The system utilizes transformer-less single-stage conversion for tracking the maximum power point and interfacing the photovoltaic arrays to the grid. The maximum power point is maintained with a fuzzy logic controller. A proportional-resonant controller is used to control the current injected into the grid. To improve the power quality and system efficiency, a double-tuned parallel resonant circuit is proposed to attenuate the second- and fourth- order harmonics at the inverter dc side. A modified carrier-based modulation technique for the current source inverter is proposed to magnetize the dc-link inductor by shorting one of the bridge converter legs after every active switching cycle. Simulation and practical results validate and confirm the dynamic performance and power quality of the proposed system.
REVIEW OF EXISTING INVERTER TOPOLOGIES
A. Common Mode Current
If the transformer is omitted, the common mode (CM) ground leakage current may appear on the parasitic capacitor between the PV panels and the ground [2] [3]. The existence of the CM current may reduce the power conversion efficiency, increase the grid current distortion, deteriorate the electric magnetic compatibility, and more importantly, give rise to the safety threats [4]. The CM current path in the grid-connected transformerless PV inverter system is illustrated in Fig.2. It is formed by the power switches, filters, ground impedance ZG and the parasitic capacitance CPV between the PV panels and the ground. According to [5], the CM current path is equivalent to an LC resonant circuit in series with the CM voltage, as shown in Fig.3. The CM voltage vCM is defined by
where vAO is the voltage difference between point A and O, vBO is the voltage difference between point B and O, and L1 and L2 are the output filter inductors. If the switching action of the inverter generates high frequency CM voltage, the CM current iCM may be exited on the LC circuit. From this point of view, the topology and modulation strategy adopted for the transformer less PV power system should guarantee that vCM is constant or only varies at low frequency, such as 50Hz/60Hz line frequency.
State-of-the-art Topologies
One of the way to realize this goal is to use full bridge inverter with the bipolar sinusoidal pulse width modulation (SPWM). Though the unipolar SPWM has better performance when compared to bipolar SPWM, it cannot be used directly for the full bridge inverter because it generates switching frequency CM voltage. For this reason, some of the topologies based on the full bridge inverter with unipolar SPWM such as the H5 inverter, the HERIC inverter, H6 inverter with AC bypass and H6 inverter with DC bypass have been developed. Such inverter topologies require two filter inductors which may lead to a rise in the size and cost. The DC and AC sides cannot be perfectly disconnected by the power switches because of the switch parasitic capacitance, so the common mode current may still exist [5]. If half bridge inverter topologies are used such as conventional half bridge inverter and neutral point clamped (NPC) half bridge inverter, then the required DC bus voltage should be doubled compared with the full bridge topologies. Beside the classic circuits above, there are other topologies proposed in recent literatures. The Karschny inverter [6] and the paralleled-buck inverter [7] are derived from the buck-boost and buck circuits respectively. These solutions have high reliability, but are not capable of supplying the reactive power to the grid. The inverter proposed in [8] employs a capacitor voltage divider to keep the CM voltage constant, but is regarded to be of higher conduction losses.
III. NEGATIVE VOLTAGE GENERATION
The concept of the negative voltage generation is depicted in Figure.4. By connecting the grid neutral line directly to the negative pole of the PV panel, the voltage across the parasitic capacitance CPV is clamped to zero. This prevents any leakage current flowing through it. With respect to the ground point N, the voltage at midpoint B is either zero or +Vdc, according to the state of the switch bridge. The purpose of introducing virtual DC bus is to generate the negative output voltage, which is necessary for the operation of the inverter. If a proper method is designed to transfer the energy between the real bus and the virtual bus, the voltage across the virtual bus can be kept the same as the real one. As shown in Fig.4, the positive pole of the virtual bus is connected to the ground point N, so that the voltage at the midpoint C is either zero or −Vdc. The dotted line in the figure indicates that this connection may be realized directly by a wire or indirectly by a power switch. With points B and C joined together by a smart selecting switch, the voltage at point A can be of three different voltage levels, namely +Vdc, zero and –Vdc. Since the CM current is eliminated naturally by the structure of the circuit, there’s not any limitation on the modulation strategy, which means that the advanced modulation technologies such as the unipolar SPWM or the double frequency SPWM can be used to satisfy various PV applications.
OPTOCOUPLER
There are many situations where signals and data need to be transferred from one subsystem to another within a piece of electronics equipment, or from one piece of equipment to another, without making a direct ohmic electrical connection. Often this is because the source and destination are (or may be at times) at very different voltage levels, like a microprocessor, which is operating from 5V DC but being used to control a triac that is switching 240V AC. In such situations the link between the two must be an isolated one, to protect the microprocessor from over voltage damage.
Relays can of course provide this kind of isolation, but even small relays tend to be fairly bulky compared with ICs and many of today’s other miniature circuit components. Because they’re electro-mechanical, relays are also not as reliable and only capable of relatively low speed operation. Where small size, higher speed and greater reliability are important, a much better alternative is to use an optocoupler. These use a beam of light to transmit the signals or data across an electrical barrier, and achieve excellent isolation.
Optocoupler typically come in a small 6-pin or 8-pin IC package, but are essentially a combination of two distinct devices: an optical transmitter, typically a gallium arsenide LED (light-emitting diode) and an optical receiver such as a phototransistor or light-triggered diac. The two are separated by a transparent barrier which blocks any electrical current flow between the two, but does allow the passage of light. The basic idea is shown, along with the usual circuit symbol for an optocoupler. Usually the electrical connections to the LED section are brought out to the pins on one side of the package and those for the phototransistor or diac to the other side, to physically separate them as much as possible. This usually allows optocouplers to withstand voltages of anywhere between 500V and 7500V between input and output. Optocouplers are essentially, digital or switching devices, so they’re best for transferring either on-off control signals or digital data. Analog signals can be transferred by means of frequency or pulse-width modulation.
Unipolar SPWM
The waveform for the unipolar SPWM of the proposed inverter is displayed in Fig.12.2. The gate drive signals for the power switches are generated according to the relative value of the modulation wave ug and the carrier wave uc. During the positive half grid cycle, ug > 0. S1 and S3 are turned on and S2 is turned off, while S4 and S5 commutate complementally with the carrier frequency. The capacitors C1 and C2 are in parallel and the circuit rotates between state 1 and state 2 as shown in Fig.12.3. During the negative half cycle, ug < 0. S5 is turned on and S4 is turned off. S1 and S3 commutate with the carrier frequency synchronously and S2 commutates in complement to them. The circuit rotates between state 3 and state 2. At state 3, S1 and S3 are turned off while S2 is turned on. The negative voltage is generated by the virtual DC bus C2 and the inverter output is at negative voltage level. At state 2, S1 and S3 are turned on while S2 is turned off. The inverter output voltage vAN equals zero, meanwhile C2 is charged by the DC bus through S1 and S3.