30-01-2013, 04:02 PM
SMBus protocol master implimentation
SMBus protocol.doc (Size: 1.12 MB / Downloads: 33)
INTRODUCTION
Overview
The System Management Bus (SMBus) is a two-wire interface through which various system component chips can communicate with each other and with the rest of the system. It is based on the principles of operation of I2C. SMBus provides a control bus for system and power management related tasks. A system may use SMBus to pass messages to and from devices instead of tripping individual control lines. Removing the individual control lines reduces pin count. Accepting messages ensures future expandability. With System Management Bus, a device can provide manufacturer information, tell the system what its model/part number is, save its state for a suspend event, report different types of errors, accept control parameters, and return its status.
Audience
The target audience for this document includes but is not limited to:
• System designers implementing the System Management Bus Specification in their systems
• VLSI engineers designing chips to connect to the System Management Bus
• Software engineers writing support code for System Management Bus chips
• OEMs and ISVs developing platform firmware.
• OEMs and IHVs developing SMBus devices.
• Others interested in accessing SMBus devices in the ACPI environment.
Scope
This document describes the electrical characteristics, network control conventions and communications protocols used by SMBus devices. These can be thought as existing at the first three layers of the seven-layer OSI network mod el, that is, the physical, data link and network layers. Functions normally implemented at higher layers of the OSI model are beyond the scope of this document. The original purpose of the SMBus was to define the communication link between an intelligent battery, a charger for the battery and a microcontroller that communicates with the rest of the system. However, SMBus can also be used to connect a wide variety of devices including power-related devices, system sensors, inventory EEPROMs communications devices and more. This version of the specification is a superset of previous versions, 1.0 and 1.1. All devices compliant with these previous versions are compliant with this version. Those features new to SMBus with this version of the spec are optional and are appropriate to the new environments enabled by those features. However, if implemented, these new features must be implemented in a manner compliant with this specification.
Applications:
The SMBus protocol can be used in
1. Smart batteries
2. Keypad and switch control
3. ACPI power switch, relays, timer
4. LED control
5. Signal monitoring
6. Sensors, fan control
CONVENTIONS
Throughout this document, SMBus addresses are given in binary format. SMBus addresses are 7 binary bits long and are conventionally expressed as 4 bits followed by 3 bits followed by the letter ‘b’, for example, 0001 110b. These addresses occupy the high seven bits of an eight-bit field on the bus. The low bit of this field, however, has other semantic meaning that is not part of an SMBus address.
Diagrams of SMBus transaction data structures as they appear on the bus are of the form:
In these diagrams, the un-shaded portions are supplied by the bus master of the bus transaction and the shaded portions are driven by the bus slave. The numbers across the top of the transaction diagram indicate the bit widths of each field. In some cases, values will be found below a field in a transaction diagram. When present, this indicates the actual value of the field. The semantics of the various sections of this example transaction are explained in the relevant part of this specification.