28-02-2013, 11:17 AM
VHDL-AMS modeling and simulation of BPSK transceiver system
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Abstract
This paper describes a methodology for top-down design,
modeling, and simulation of complete RF system using hardware
description language VHDL-AMS.
As a demonstration example, we consider a simple BPSK system
(transmitter, channel, and receiver) and show the details of
VHDL-AMS implementation for each elementary block (mixer, oscillator,
amplier, channel, etc.). Using these behavioral blocks, we
simulate our BPSK system and evaluate system performance in the
presence of noise. We show that the results of VHDL-AMS simulations
match both Agilent ADS results and theoretical calculations.
This tutorial-like paper together with the developed library of
RF blocks is targeted towards engineers who work on behavioral
modeling and simulation of complete RF systems using hardware
description languages.
INTRODUCTION
One great challenge in the design of radio frequency
(RF) communication system-on-chips is verication and
debugging of its functional performance at different detail
levels: top-level, sub-system level, and circuit level.
To be practical, modeling and simulation tools used for
that must t into existing RF, analog, and digital design
ows. Flow standards strongly depend on electronic design
automation (EDA) companies providing the tools
for system level RF simulation (e.g. Agilent ADS or
Cadence SPW), analog circuit simulation (e.g., Spectre
RF, Hspice), and digital synthesis (VHDL- and Verilogbased).
TRANSCEIVER SYSTEM
Consider the following example BPSK transceiver
system shown in Figure 1 that consists of a transmitter,
an antennas/propagation channel, and a receiver. Binary
phase shift keying uses binary polar signals to modulate
the phase of the carrier by 180 degrees. Digital data is
converted to an analog signal by passing through a 1-bit
D/A converter. The analog signal is then up-converted,
amplied, and transmitted into the noisy channel. Received
signal is amplied, down-converted, low-pass ltered,
and converted back into the digital domain.
The system uses a modulation frequency of 2.45 GHz
and a data rate of 250 Mbps. The power amplier
(PA) and low-noise amplier (LNA) each have a gain of
+10 dBV, and the channel loss is assumed to be -20 dBV.
The noise in the channel is varied from -16 dBV to -
4 dBV so that Eb/No values range between -6 dbV and
+6 dbV.
VHDL-AMS BEHAVIORAL BLOCKS
Modulator
To generate random stream of data for BPSK modulator,
a non-periodic uniformly-distributed data source
was created. The BPSK modulator itself consists of a
1-bit D/A converter, an oscillator, and a mixer. A D/A
converter essentially shifts voltage levels of the source
data and maps a logic '0' to -1V and a logic '1' to +1V.
Multiplied by the oscillator frequency, this results in a
BPSK-modulated signal. The modulator blocks are implemented
in an ideal manner with no non-linearities or
noise sources.
Ampliers, Antennas/Propagation Channel
The power amplier (PA) and the low-noise ampli-
er (LNA) are implemented as ideal pure gain blocks
so that the functionality of the algorithm and relation
to the theoretical system is quickly conrmed in simulation.
The channel that contains both the effects of transmitting
and receiving antennas and propagation effects
is implemented as an ideal gain block with an additive
white Gaussian noise (AWGN). Although other types of
noise and interference are possible in a realistic RF environment,
AWGN is most common and also allows one to
compare BER simulation results to the theoretical calculations.
CONCLUSIONS
In this paper, we described a methodology for modeling
and simulation of complete RF system using VHDLAMS.
As a demonstration example, we considered a simple
BPSK system and developed a library of behavioral
level blocks for it. We simulated and evaluated system
performance in a noisy environment and found that
VHDL-AMS simulation results agree well with theoretical
calculations and Agilent ADS simulations.
We target this paper towards the audience use of
VHDL-AMS and thus describe in details our library of
behavioral level VHDL-AMS RF blocks. We hope that
this paper will help VHDL-AMS designers to better understand
the process of HDL modeling and simulation
for RF systems.