12-04-2014, 10:52 AM
Programming Techniques
Overview
This manual is designed to help programmers rapidly exploit the power of the ARM processor for
embedded applications. The material has been written by ARM staff who have accumulated
considerable experience with software for the ARM and Thumb microprocessors.
We have targeted this manual at embedded systems programmers who have some experience
with other architectures, and who wish to quickly learn how to use an ARM chip.
The ARM Architecture—a brief overview
ARM architecture has evolved considerably since its first development. There are four major
versions:
Architectures 1 and 2
The original architecture—Version 1—was implemented only by ARM1, and was never used in
a commercial product.
ARM Architecture Version 2 was the first to be used commerially. It extended Version 1 by
adding:
• the multiply and multiply accumulate instructions (MUL and MLA)
• support for coprocessors
• a further two banked registers for FIQ mode
Version 2a introduced an Atomic Load and Store instruction (SWP) and the use of Coprocessor
15 as a system control coprocessor. Versions 1, 2 and 2a all supported a 26-bit address bus and
combined in register 15 a 24-bit Program Counter (PC) and 8 bits of processor status.
Memory Formats
The ARM views memory as a linear collection of bytes numbered upwards from zero. Bytes 0
to 3 hold the first stored word, bytes 4 to 7 the second and so on. The ARM can treat words in
memory as being stored either in Big Endian or Little Endian format.
Big endian format
In big endian format, the most significant byte of a word is stored at the lowest numbered byte
and the least significant byte at the highest numbered byte. Byte 0 of the memory system is
therefore connected to data lines 31 through 24.