30-10-2012, 04:08 PM
Instruction Set Architecture
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Instruction Set Architecture
Which operations will a processor support?
• ADD, MULT, SUB …
Where can ALU operands reside?
• Memory, registers, stack
Where can ALU result be stored?
• Memory, registers, stack
How many operands in each instruction?
• Fixed or as many as we want
Range of operands
Length of an instruction
• Fixed or variable
Goals for Instruction Set Design
Short instructions
• Minimize instruction width – minimize
program size
Good instruction density
• Minimize instruction count – minimize
program size
Fast operations
• ADD (100), (200), (40) longer than
ADD R1, R2, R3
Simple circuitry
Compiler optimisation
Stack Architecture
Special instructions to access memory
• push, pop
Operands loaded from memory onto the stack
ALU performs operation upon the last two
elements on the stack
Both operands and location of result are implicit
First operand is removed from the stack, result is
written in the place of the second operand
Result has to be explicitly stored back into
memory
Accumulator Architecture
Any operation can access memory
First operand is loaded from the memory
into accumulator
Operation is performed on the accumulator
and the second operand (from the memory)
First operand and location of result are
implicit
Result is written into accumulator
Result has to be explicitly stored back
into memory