13-03-2012, 04:30 PM
SUPERSCALAR AND VLIW PROCESSORS
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What is a Superscalar Architecture?
• A superscalar architecture is one in which several
instructions can be initiated simultaneously and
executed independently.
• Pipelining allows several instructions to be
executed at the same time, but they have to be in
different pipeline stages at a given moment.
• Superscalar architectures include all features of
pipelining but, in addition, there can be several
instructions executing simultaneously in the same
pipeline stage.
Superscalar Architectures
• Superscalar architectures allow several instructions
to be issued and completed per clock cycle.
• A superscalar architecture consists of a number of
pipelines that are working in parallel.
• Depending on the number and kind of parallel units
available, a certain number of instructions can be
executed in parallel.
• In the following example a floating point and two integer
operations can be issued and executed simultaneously;
each unit is pipelined and can execute
several operations in different pipeline stages.
Limitations on Parallel Execution
• The situations which prevent instructions to be
executed in parallel by a superscalar architecture
are very similar to those which prevent an efficient
execution on any pipelined architecture (see
pipeline hazards - lecture 6/7).
• The consequences of these situations on
superscalar architectures are more severe than
those on simple pipelines, because the potential of
parallelism in superscalars is greater and, thus, a
greater opportunity is lost.
Policies for Parallel Instruction Execution
• The ability of a superscalar processor to execute
instructions in parallel is determined by:
1. the number and nature of parallel pipelines
(this determines the number and nature of instructions
that can be fetched and executed at
the same time);
2. the mechanism that the processor uses to find
independent instructions (instructions that can
be executed in parallel).
• The policies used for instruction execution are
characterized by the following two factors:
1. the order in which instructions are issued for
execution;
2. the order in which instructions are completed
(they write results into registers and memory
locations).