27-07-2012, 12:31 PM
System-in-Package (SiP): A Guide for Electronics Design Engineers
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Introduction
The past decade has seen the emergence of a range of System -in-Package technologies
driven by the relentless demands of the portable and consumer electronics industry for
ever-greater product functionality and for improved performance at ever-reducing costs.
System-in-Package technologies provide a system or sub-system level of functionality
within a single package outline. SiP combines single die or multiple, mixed technology die
with passive and other supporting components. The ability to integrate devices and to mix
technologies within a standard package footprint can lead to smaller footprints than
standard SMT implementations, and to improved performance, lower NREs and reduced
New Product Introduction (NPI) cycle times when compared with the System-on-Chip
option and to reduced product function level costs savings.
The principal categories of SiP technologies include planar and stacked die SiPs, in 2D and
3D configurations that employ wire bond, flip chip, and solder ball and Through-Silicon-Via
(TSV) interconnection structures. A range of SiP packaging platforms are employed that
include leadframe, LTCC, laminate and thin film substrate options, the latter three
categories being with or without integrated passive components.
One of the key barriers to the further take-up of SiP technologies has been the availability
of design tools and robust design routes to ensure right-first-time design and minimal NPI
cycle times. The latter is of particular relevance when integrated passives components are
included since design iteration cycle times tend to be greater than for SMT passives.
Design-for-Test, for Reliability, Thermal design and a number of other design dimensions
are also of particular relevance for SiP design.
The provision of this SiP technology overview, design routes, applications and design
guidance for the UK Design Community is intended to play to a key UK strength and to
assist in the capture of significant added value for this industry sector.
Objectives
The objectives of this SiP Design Guide for Electronics Engineers Project are as follows:
1 To introduce the range of SiP technologies in current application.
2 To review the benefits of SiP technology.
3 To provide examples of SiP applications.
4 To set out the available design routes, design tools for SiP.
5 To provide initial guidance for UK engineers wishing to embark on SiP design.
6 To outline future trends in SiP technology and applications.
This second report addresses the third project objective, to provide examples of SiP
applications.
Approach
The approach being adopted in this Design Guide project has involved a combination of
networking activities and interviews with key SiP technology and applications experts in the
UK, Europe and the USA. The project has also drawn upon the current TSB projects,
ADEPT-SiP, that is developing design routes for pcb-based SiP technology, and PPM2,
that is addressing precision passive component technologies on silicon substrates, both of
which are being lead by TWI. Contacts from recent SiP and packaging seminars organised by TWI and NMI are also being used to provide technology, design and applications data
for this EKTN project.
The application of SiP technology and concepts in the Photonics applications area is also to
be reviewed and compared with related activities in the electronics SiP space. This will
utilise TWI links as a partner in the Photonics KTN.
The results of the above interviews, together with SiP literature data and background data
are being coordinated and compiled into a set of two interim reports and a final report,
together with a set of supporting presentations that will be converted to webinars by the
EKTN. This work is being completed over the twelve month project period from May 2008
and is also being tied in with UK Design Community Dissemination events.
SiP networking and interview activities in 2008 have included organisation and co-chairing
of the joint NMI/TWI Design for SiP seminar at TWI, visits to IMEC in Leuven, participation
in the iNEMI Roadmap European Workshop meeting in Germany in June, visits to NXP in
Caen and to STMicroelectronics in Tour in July, attendance at the ESTC conference in
Greenwich in September and a visit to Unisem in the UK in November. Related SiP
networking and interview activities in 2009 have included visits to TechSearch International,
Skyworks and RFMD and discussions with Amkor at a MEPTEC event in the USA in
February and the organisation of a joint NMI/TWI Packaging Roadmap seminar that is to be
held at TWI in April.
SiP definitions and functionality
The definition of SiP that is being employed in this project has been updated from that set
out in the previous project report as follows [1, 2, 3, 4, 5, 6, 7]:
System-in-Package is a functional system or sub-system assembled into a single
package. It contains a single die or two or more dissimilar die, (typically) combined with
other components such as passive components (resistors, capacitors and inductors),
passive networks (filters, baluns, antennas) and/or mechanical and/or optical components
(MEMS, MOEMS, photonics devices). These components are mounted, embedded and/or
integrated together on a substrate or package base to create a customised, highly
integrated product for a given application.
The SiP functionality definition has also been updated to include electrical screening and
now reads as follows:
a) Internal electrical interconnections between SiP active, passive and mechanical devices.
b) External electrical interconnections to the pcb at a supportable pitch.
c) Environmental protection and encapsulation of the SiP integrated active, passive and
mechanical/optical devices to allow test, handling, pcb assembly, mechanical and
environmental reliability.
d) Electrical screening between the SiP module and surrounding pcb–level components.
e) A thermal dissipation path between the devices, components, the module, the pcb and
the system ambient.
f) SiP identity and traceability.
SiP survey
The SiP survey was conducted using a web-based survey form, a copy of which is included
in Appendix A of this report. The form included the following sections to be completed by
the survey participants:
a. Company name, address, contact details
b. Your reasons for adopting SiP
c. Your position in the SiP supply chain
d. SiP application example data collection
e. SiP technologies employed in the application example
f. SiP design tools, design route employed in the application example
g. Willingness to supply SiP technology example image(s)
The web survey form was posted onto the TWI web site and the web address and an
invitation to participate in the survey also emailed directly to some 300 companies and
organisations known to be active or to have an interest in SiP technology and its
applications.