15-01-2013, 12:22 PM
Three-Phase Dual-Buck Inverter With Unified Pulsewidth Modulation
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Abstract
This paper presents a new type of three-phase voltage
source inverter (VSI), called three-phase dual-buck inverter. The
proposed inverter does not need dead time, and thus avoids the
shoot-through problems of traditional VSIs, and leads to greatly
enhanced system reliability. Though it is still a hard-switching inverter,
the topology allows the use of power MOSFETs as the active
devices instead of IGBTs typically employed by traditional hardswitching
VSIs. As a result, the inverter has the benefit of lower
switching loss, and it can be designed at higher switching frequency
to reduce current ripple and the size of passive components. A unified
pulsewidth modulation (PWM) is introduced to reduce computational
burden in real-time implementation. Different PWM
methods were applied to a three-phase dual-buck inverter, including
sinusoidal PWM (SPWM), space vector PWM (SVPWM) and
discontinuous space vector PWM (DSVPWM). A 2.5kW prototype
of a three-phase dual-buck inverter and its control system
has been designed and tested under different dc bus voltage and
modulation index conditions to verify the feasibility of the circuit,
the effectiveness of the controller, and to compare the features of
different PWMs. Efficiency measurement of different PWMs has
been conducted, and the inverter sees peak efficiency of 98.8% with
DSVPWM.
INTRODUCTION
THE widely used standard three-phase voltage source inverter
(VSI) has two active switches in one phase leg that
present some common problems. First, dead time is needed between
the two active switches of the same phase leg, which
reduces the equivalent pulsewidth-modulated voltage, and leads
to output waveform distortions and less energy transfer. Second,
even with dead time, shoot-through is still the major killer of
VSIs, especially at some fault conditions. Third, people cannot
simply employ power MOSFETs because of the reverse recovery
problems of the body diode [1]–[5]. In order to obtain the
benefits of using MOSFETs, such as low switching loss, resistive
conduction voltage drop, and fast switching speed that
allows reduction of current ripple and the size of passive components.
TOPOLOGY AND OPERATION PRINCIPLE
The proposed three-phase dual-buck inverter has been shown
in Fig. 1. Though it is a VSI, the PWMs for the active switches
are determined by the phase output current. Fig. 2 shows the
relation between the polarity of phase current and the operation
of switches. Take phase A, for example, when iA is positive, S1
and D4 are the conducting devices and when iA is negative, S4
andD1 are the conducting devices. The same operation principle
applies to phases B and C.
Fig. 3 shows the four switching states for phase A. It can
clearly be seen that the body diodes of S1 and S4 never have
the opportunity to conduct, which ensures the safe switching of
power MOSFETs.
UNIFIED PWM ANALYSIS
Even though MOSFETs are used for the three-phase dualbuck
inverter to cut down switching losses, it is still a hardswitching
VSI. Therefore, it is better to further reduce the
switching loss by incorporating DSVPWM. At the same time,
the dc bus voltage can be fully utilized by adopting SVPWM
or DSVPWM rather than SPWM. Traditionally, the SVPWM
methods [17]–[19] need to do trigonometric calculation and
perform recombination of actual gating times, which is unfavorable
for real-time implementation by a digital signal processor.
Thanks to unified PWM methods [13]–[16], SVPWM and
DSVPWM can be equivalently generated using triangle carrier
comparison like SPWM, which greatly reduces computational
burden and is very easy to implement by DSP.
CLOSED-LOOP SYSTEM DESIGN
In order to demonstrate the feasibility and advantages of the
three-phase dual-buck inverter, the closed-loop control is derived
and designed for a three-phase standalone system.
Fig. 6 shows the average model of three-phase dual-buck
inverter. dj (j = a, b, c) is the phase duty cycle, Lf and Cf are
the filter inductor and capacitor, and Lj is the output inductor of
each phase.
EXPERIMENTAL RESULTS
To prove the viability and merits of the proposed three-phase
dual-buck inverter and evaluate the unified PWM scheme, a
2.5 kW, 208VAC output inverter system in standalone operation
was designed and tested. The switching frequency is 20 kHz. All
the devices are rated at 600V. The MOSFET is STY80NM60N
with on-resistance 35 mΩ, and the diode is RURG3060 with reverse
recovery time 55 ns. The passive components are selected
as follows: Lp = Ln = 250 μH, Lf = 1 mH, Cf = 2.4 μF. The
obtained cut-off frequency with the filters is 2.9 kHz. The load
is variable resistive load bank.
CONCLUSION
A new type of VSI, the three-phase dual-buck inverter, has
been proposed. It has the advantage of utilizing power MOSFETs
as active switches, and improves inverter reliability by
eliminating the possibility of shoot-through and the need for
dead-time. In order to reduce the computational load on the digital
signal processor, unified PWM was analyzed and applied,
including SPWM, SVPWM, and DSVPWM.
To prove the effectiveness of the proposed topology and control
scheme, a three-phase dual-buck inverter system operating
at standalone mode with 2.5 kW, 208VAC output capability has
been designed and tested. Different PWM methods were tested
under different dc bus voltage and duty cycle conditions. The efficiency
of different cases was reported, and the peak efficiency
was 98.8%.