22-02-2013, 11:53 AM
To design a Sample & Hold circuit and to study its output response.
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OBJECTIVE: - To design a Sample & Hold circuit and to study its output response.
(I) PRACTICAL SIGNIFICANCE: - S/H circuits are used in digital modulators.
(II) COMPETENCY/SKILL: - Design and observation.
(III) EXPERIMENT OBJECTIVE: -
To design a Sample & Hold circuit and to study its output response.
To verify that the circuit samples an input signal and holds on to its last sampled value until the input sampled again.
(IV) THEORETICAL BACKGROUND: -
The sample & hold circuit as its name implies, samples an input signal and holds on to its last sampled value until the input is sampled again. Figure (4) shows a sample & hold circuit using an op-amp with an E-MOSFET. In this circuit, the E-MOSFET works as a switch that is controlled by the sample & hold control voltage VS, and the capacitor C serves as a storage element. The circuit operates as follows. The analog signal VIN to be sampled is applied to the drain, and sample & hold control voltage VS is applied to the gate of the E-MOSFET. During the positive portion of VS, the E-MOSFET conducts and acts as a closed switch. This allows input voltage to charge capacitor C. in other words, input voltage appears across C and in turn at the output, as shown in figure (4 a) on the other hand, when VS is zero, the E-MOSFET is off (non-conductive) and acts as an open switch. The only discharge path for C is, therefore, through the op-amp. However, the input resistance of the op-amp voltage follower is also very high; hence, the voltage across C is retained. The time periods Ts of the sample & hold control voltage VS during which the voltage across the capacitor is equal to the input voltage are called SAMPLE PERIODS. The time period TH of VS during which the voltage across the capacitor is constant are called HOLD PERIODS.
The output of the op-amp is usually processed/ observes during hold periods. To obtain close approximation of the input waveform, the frequency of the sample & hold control voltage must be significantly higher than that of the input. In critical applications, a precision and/or high speed op-amp is helpful. If possible, choose a low-leakage capacitor such as Teflon or Polyethylene. The sample & hold circuit is commonly used in digital interfacing and communications such as analog to digital and pulse modulation systems.
PROCEDURE: -
1. Switch on the trainer and check the supply to be +15v &-15v.
2. Patch the circuit as shown in wiring diagram.
3. Connect 5 KHz sine wave signal from function generator and adjust the amplitude to be +5v (p-p).
4. Connect 2 KHz square wave signal from function generator.
5. Set the 10k potentiometer to mid range.
6. Observe the output on CRO at pin no 6 of 741 op-amps.
7. Plot the graph between Vin VS Vout.